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6#include <common.h>
7#include <errno.h>
8#include <log.h>
9#include <malloc.h>
10#include <asm/io.h>
11#include <mmc.h>
12#include <spi_flash.h>
13#include <nand.h>
14#include <asm/arch/image.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/mach-imx/boot_mode.h>
17
18#define MMC_DEV 0
19#define QSPI_DEV 1
20#define NAND_DEV 2
21#define QSPI_NOR_DEV 3
22
23static int __get_container_size(ulong addr)
24{
25 struct container_hdr *phdr;
26 struct boot_img_t *img_entry;
27 struct signature_block_hdr *sign_hdr;
28 u8 i = 0;
29 u32 max_offset = 0, img_end;
30
31 phdr = (struct container_hdr *)addr;
32 if (phdr->tag != 0x87 && phdr->version != 0x0) {
33 debug("Wrong container header\n");
34 return -EFAULT;
35 }
36
37 max_offset = sizeof(struct container_hdr);
38
39 img_entry = (struct boot_img_t *)(addr + sizeof(struct container_hdr));
40 for (i = 0; i < phdr->num_images; i++) {
41 img_end = img_entry->offset + img_entry->size;
42 if (img_end > max_offset)
43 max_offset = img_end;
44
45 debug("img[%u], end = 0x%x\n", i, img_end);
46
47 img_entry++;
48 }
49
50 if (phdr->sig_blk_offset != 0) {
51 sign_hdr = (struct signature_block_hdr *)(addr + phdr->sig_blk_offset);
52 u16 len = sign_hdr->length_lsb + (sign_hdr->length_msb << 8);
53
54 if (phdr->sig_blk_offset + len > max_offset)
55 max_offset = phdr->sig_blk_offset + len;
56
57 debug("sigblk, end = 0x%x\n", phdr->sig_blk_offset + len);
58 }
59
60 return max_offset;
61}
62
63static int get_container_size(void *dev, int dev_type, unsigned long offset)
64{
65 u8 *buf = malloc(CONTAINER_HDR_ALIGNMENT);
66 int ret = 0;
67
68 if (!buf) {
69 printf("Malloc buffer failed\n");
70 return -ENOMEM;
71 }
72
73#ifdef CONFIG_SPL_MMC_SUPPORT
74 if (dev_type == MMC_DEV) {
75 unsigned long count = 0;
76 struct mmc *mmc = (struct mmc *)dev;
77
78 count = blk_dread(mmc_get_blk_desc(mmc),
79 offset / mmc->read_bl_len,
80 CONTAINER_HDR_ALIGNMENT / mmc->read_bl_len,
81 buf);
82 if (count == 0) {
83 printf("Read container image from MMC/SD failed\n");
84 return -EIO;
85 }
86 }
87#endif
88
89#ifdef CONFIG_SPL_SPI_LOAD
90 if (dev_type == QSPI_DEV) {
91 struct spi_flash *flash = (struct spi_flash *)dev;
92
93 ret = spi_flash_read(flash, offset,
94 CONTAINER_HDR_ALIGNMENT, buf);
95 if (ret != 0) {
96 printf("Read container image from QSPI failed\n");
97 return -EIO;
98 }
99 }
100#endif
101
102#ifdef CONFIG_SPL_NAND_SUPPORT
103 if (dev_type == NAND_DEV) {
104 ret = nand_spl_load_image(offset, CONTAINER_HDR_ALIGNMENT,
105 buf);
106 if (ret != 0) {
107 printf("Read container image from NAND failed\n");
108 return -EIO;
109 }
110 }
111#endif
112
113#ifdef CONFIG_SPL_NOR_SUPPORT
114 if (dev_type == QSPI_NOR_DEV)
115 memcpy(buf, (const void *)offset, CONTAINER_HDR_ALIGNMENT);
116#endif
117
118 ret = __get_container_size((ulong)buf);
119
120 free(buf);
121
122 return ret;
123}
124
125static unsigned long get_boot_device_offset(void *dev, int dev_type)
126{
127 unsigned long offset = 0;
128
129 if (dev_type == MMC_DEV) {
130 struct mmc *mmc = (struct mmc *)dev;
131
132 if (IS_SD(mmc) || mmc->part_config == MMCPART_NOAVAILABLE) {
133 offset = CONTAINER_HDR_MMCSD_OFFSET;
134 } else {
135 u8 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
136
137 if (part == 1 || part == 2) {
138 if (is_imx8qxp() && is_soc_rev(CHIP_REV_B))
139 offset = CONTAINER_HDR_MMCSD_OFFSET;
140 else
141 offset = CONTAINER_HDR_EMMC_OFFSET;
142 } else {
143 offset = CONTAINER_HDR_MMCSD_OFFSET;
144 }
145 }
146 } else if (dev_type == QSPI_DEV) {
147 offset = CONTAINER_HDR_QSPI_OFFSET;
148 } else if (dev_type == NAND_DEV) {
149 offset = CONTAINER_HDR_NAND_OFFSET;
150 } else if (dev_type == QSPI_NOR_DEV) {
151 offset = CONTAINER_HDR_QSPI_OFFSET + 0x08000000;
152 }
153
154 return offset;
155}
156
157static int get_imageset_end(void *dev, int dev_type)
158{
159 unsigned long offset1 = 0, offset2 = 0;
160 int value_container[2];
161
162 offset1 = get_boot_device_offset(dev, dev_type);
163 offset2 = CONTAINER_HDR_ALIGNMENT + offset1;
164
165 value_container[0] = get_container_size(dev, dev_type, offset1);
166 if (value_container[0] < 0) {
167 printf("Parse seco container failed %d\n", value_container[0]);
168 return value_container[0];
169 }
170
171 debug("seco container size 0x%x\n", value_container[0]);
172
173 value_container[1] = get_container_size(dev, dev_type, offset2);
174 if (value_container[1] < 0) {
175 debug("Parse scu container failed %d, only seco container\n",
176 value_container[1]);
177
178 return value_container[0] + offset1;
179 }
180
181 debug("scu container size 0x%x\n", value_container[1]);
182
183 return value_container[1] + offset2;
184}
185
186#ifdef CONFIG_SPL_SPI_LOAD
187unsigned long spl_spi_get_uboot_offs(struct spi_flash *flash)
188{
189 int end;
190
191 end = get_imageset_end(flash, QSPI_DEV);
192 end = ROUND(end, SZ_1K);
193
194 printf("Load image from QSPI 0x%x\n", end);
195
196 return end;
197}
198#endif
199
200#ifdef CONFIG_SPL_MMC_SUPPORT
201unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
202 unsigned long raw_sect)
203{
204 int end;
205
206 end = get_imageset_end(mmc, MMC_DEV);
207 end = ROUND(end, SZ_1K);
208
209 printf("Load image from MMC/SD 0x%x\n", end);
210
211 return end / mmc->read_bl_len;
212}
213#endif
214
215#ifdef CONFIG_SPL_NAND_SUPPORT
216uint32_t spl_nand_get_uboot_raw_page(void)
217{
218 int end;
219
220 end = get_imageset_end((void *)NULL, NAND_DEV);
221 end = ROUND(end, SZ_16K);
222
223 printf("Load image from NAND 0x%x\n", end);
224
225 return end;
226}
227#endif
228
229#ifdef CONFIG_SPL_NOR_SUPPORT
230unsigned long spl_nor_get_uboot_base(void)
231{
232 int end;
233
234
235
236
237
238
239 end = get_imageset_end((void *)NULL, QSPI_NOR_DEV);
240 if (end <= CONFIG_SYS_UBOOT_BASE)
241 end = CONFIG_SYS_UBOOT_BASE;
242 else
243 end = ROUND(end, SZ_1K);
244
245 printf("Load image from NOR 0x%x\n", end);
246
247 return end;
248}
249#endif
250
