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6#include <command.h>
7#include <console.h>
8#include <dfu.h>
9#include <malloc.h>
10#include <misc.h>
11#include <mmc.h>
12#include <part.h>
13#include <asm/arch/stm32mp1_smc.h>
14#include <dm/uclass.h>
15#include <jffs2/load_kernel.h>
16#include <linux/list.h>
17#include <linux/list_sort.h>
18#include <linux/mtd/mtd.h>
19#include <linux/sizes.h>
20
21#include "stm32prog.h"
22
23
24#define GPT_HEADER_SZ 34
25
26#define OPT_SELECT BIT(0)
27#define OPT_EMPTY BIT(1)
28#define OPT_DELETE BIT(2)
29
30#define IS_SELECT(part) ((part)->option & OPT_SELECT)
31#define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
32#define IS_DELETE(part) ((part)->option & OPT_DELETE)
33
34#define ALT_BUF_LEN SZ_1K
35
36#define ROOTFS_MMC0_UUID \
37 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
38 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
39
40#define ROOTFS_MMC1_UUID \
41 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
42 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
43
44#define ROOTFS_MMC2_UUID \
45 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
46 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
47
48
49#define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
50
51
52
53
54
55
56static const efi_guid_t uuid_mmc[3] = {
57 ROOTFS_MMC0_UUID,
58 ROOTFS_MMC1_UUID,
59 ROOTFS_MMC2_UUID
60};
61
62DECLARE_GLOBAL_DATA_PTR;
63
64
65enum stm32prog_col_t {
66 COL_OPTION,
67 COL_ID,
68 COL_NAME,
69 COL_TYPE,
70 COL_IP,
71 COL_OFFSET,
72 COL_NB_STM32
73};
74
75
76int mtdparts_init(void);
77int find_dev_and_part(const char *id, struct mtd_device **dev,
78 u8 *part_num, struct part_info **part);
79
80char *stm32prog_get_error(struct stm32prog_data *data)
81{
82 static const char error_msg[] = "Unspecified";
83
84 if (strlen(data->error) == 0)
85 strcpy(data->error, error_msg);
86
87 return data->error;
88}
89
90u8 stm32prog_header_check(struct raw_header_s *raw_header,
91 struct image_header_s *header)
92{
93 unsigned int i;
94
95 header->present = 0;
96 header->image_checksum = 0x0;
97 header->image_length = 0x0;
98
99 if (!raw_header || !header) {
100 pr_debug("%s:no header data\n", __func__);
101 return -1;
102 }
103 if (raw_header->magic_number !=
104 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
105 pr_debug("%s:invalid magic number : 0x%x\n",
106 __func__, raw_header->magic_number);
107 return -2;
108 }
109
110 if (raw_header->header_version != 0x00010000) {
111 pr_debug("%s:invalid header version : 0x%x\n",
112 __func__, raw_header->header_version);
113 return -3;
114 }
115 if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
116 pr_debug("%s:invalid reserved field\n", __func__);
117 return -4;
118 }
119 for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
120 if (raw_header->padding[i] != 0) {
121 pr_debug("%s:invalid padding field\n", __func__);
122 return -5;
123 }
124 }
125 header->present = 1;
126 header->image_checksum = le32_to_cpu(raw_header->image_checksum);
127 header->image_length = le32_to_cpu(raw_header->image_length);
128
129 return 0;
130}
131
132static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
133{
134 u32 i, checksum;
135 u8 *payload;
136
137
138 payload = (u8 *)addr;
139 checksum = 0;
140 for (i = header->image_length; i > 0; i--)
141 checksum += *(payload++);
142
143 return checksum;
144}
145
146
147static int parse_option(struct stm32prog_data *data,
148 int i, char *p, struct stm32prog_part_t *part)
149{
150 int result = 0;
151 char *c = p;
152
153 part->option = 0;
154 if (!strcmp(p, "-"))
155 return 0;
156
157 while (*c) {
158 switch (*c) {
159 case 'P':
160 part->option |= OPT_SELECT;
161 break;
162 case 'E':
163 part->option |= OPT_EMPTY;
164 break;
165 case 'D':
166 part->option |= OPT_DELETE;
167 break;
168 default:
169 result = -EINVAL;
170 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
171 i, *c, p);
172 return -EINVAL;
173 }
174 c++;
175 }
176 if (!(part->option & OPT_SELECT)) {
177 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
178 return -EINVAL;
179 }
180
181 return result;
182}
183
184static int parse_id(struct stm32prog_data *data,
185 int i, char *p, struct stm32prog_part_t *part)
186{
187 int result = 0;
188 unsigned long value;
189
190 result = strict_strtoul(p, 0, &value);
191 part->id = value;
192 if (result || value > PHASE_LAST_USER) {
193 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
194 result = -EINVAL;
195 }
196
197 return result;
198}
199
200static int parse_name(struct stm32prog_data *data,
201 int i, char *p, struct stm32prog_part_t *part)
202{
203 int result = 0;
204
205 if (strlen(p) < sizeof(part->name)) {
206 strcpy(part->name, p);
207 } else {
208 stm32prog_err("Layout line %d: partition name too long [%d]: %s",
209 i, strlen(p), p);
210 result = -EINVAL;
211 }
212
213 return result;
214}
215
216static int parse_type(struct stm32prog_data *data,
217 int i, char *p, struct stm32prog_part_t *part)
218{
219 int result = 0;
220 int len = 0;
221
222 part->bin_nb = 0;
223 if (!strncmp(p, "Binary", 6)) {
224 part->part_type = PART_BINARY;
225
226
227 len = strlen(p);
228 part->bin_nb = 1;
229 if (len > 6) {
230 if (len < 8 ||
231 (p[6] != '(') ||
232 (p[len - 1] != ')'))
233 result = -EINVAL;
234 else
235 part->bin_nb =
236 simple_strtoul(&p[7], NULL, 10);
237 }
238 } else if (!strcmp(p, "System")) {
239 part->part_type = PART_SYSTEM;
240 } else if (!strcmp(p, "FileSystem")) {
241 part->part_type = PART_FILESYSTEM;
242 } else if (!strcmp(p, "RawImage")) {
243 part->part_type = RAW_IMAGE;
244 } else {
245 result = -EINVAL;
246 }
247 if (result)
248 stm32prog_err("Layout line %d: type parsing error : '%s'",
249 i, p);
250
251 return result;
252}
253
254static int parse_ip(struct stm32prog_data *data,
255 int i, char *p, struct stm32prog_part_t *part)
256{
257 int result = 0;
258 unsigned int len = 0;
259
260 part->dev_id = 0;
261 if (!strcmp(p, "none")) {
262 part->target = STM32PROG_NONE;
263 } else if (!strncmp(p, "mmc", 3)) {
264 part->target = STM32PROG_MMC;
265 len = 3;
266 } else if (!strncmp(p, "nor", 3)) {
267 part->target = STM32PROG_NOR;
268 len = 3;
269 } else if (!strncmp(p, "nand", 4)) {
270 part->target = STM32PROG_NAND;
271 len = 4;
272 } else if (!strncmp(p, "spi-nand", 8)) {
273 part->target = STM32PROG_SPI_NAND;
274 len = 8;
275 } else if (!strncmp(p, "ram", 3)) {
276 part->target = STM32PROG_RAM;
277 len = 0;
278 } else {
279 result = -EINVAL;
280 }
281 if (len) {
282
283 if (strlen(p) != len + 1) {
284 result = -EINVAL;
285 } else {
286 part->dev_id = p[len] - '0';
287 if (part->dev_id > 9)
288 result = -EINVAL;
289 }
290 }
291 if (result)
292 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
293
294 return result;
295}
296
297static int parse_offset(struct stm32prog_data *data,
298 int i, char *p, struct stm32prog_part_t *part)
299{
300 int result = 0;
301 char *tail;
302
303 part->part_id = 0;
304 part->addr = 0;
305 part->size = 0;
306
307 if (!strncmp(p, "boot", 4)) {
308 if (strlen(p) != 5) {
309 result = -EINVAL;
310 } else {
311 if (p[4] == '1')
312 part->part_id = -1;
313 else if (p[4] == '2')
314 part->part_id = -2;
315 else
316 result = -EINVAL;
317 }
318 if (result)
319 stm32prog_err("Layout line %d: invalid part '%s'",
320 i, p);
321 } else {
322 part->addr = simple_strtoull(p, &tail, 0);
323 if (tail == p || *tail != '\0') {
324 stm32prog_err("Layout line %d: invalid offset '%s'",
325 i, p);
326 result = -EINVAL;
327 }
328 }
329
330 return result;
331}
332
333static
334int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
335 struct stm32prog_part_t *part) = {
336 [COL_OPTION] = parse_option,
337 [COL_ID] = parse_id,
338 [COL_NAME] = parse_name,
339 [COL_TYPE] = parse_type,
340 [COL_IP] = parse_ip,
341 [COL_OFFSET] = parse_offset,
342};
343
344static int parse_flash_layout(struct stm32prog_data *data,
345 ulong addr,
346 ulong size)
347{
348 int column = 0, part_nb = 0, ret;
349 bool end_of_line, eof;
350 char *p, *start, *last, *col;
351 struct stm32prog_part_t *part;
352 int part_list_size;
353 int i;
354
355 data->part_nb = 0;
356
357
358 if (!stm32prog_header_check((struct raw_header_s *)addr,
359 &data->header)) {
360 u32 checksum;
361
362 addr = addr + BL_HEADER_SIZE;
363 size = data->header.image_length;
364
365 checksum = stm32prog_header_checksum(addr, &data->header);
366 if (checksum != data->header.image_checksum) {
367 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
368 checksum, data->header.image_checksum);
369 return -EIO;
370 }
371 }
372 if (!size)
373 return -EINVAL;
374
375 start = (char *)addr;
376 last = start + size;
377
378 *last = 0x0;
379 pr_debug("flash layout =\n%s\n", start);
380
381
382 part_list_size = 1;
383 p = start;
384 while (*p && (p < last)) {
385 if (*p++ == '\n') {
386 part_list_size++;
387 if (p < last && *p == '#')
388 part_list_size--;
389 }
390 }
391 if (part_list_size > PHASE_LAST_USER) {
392 stm32prog_err("Layout: too many partition (%d)",
393 part_list_size);
394 return -1;
395 }
396 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
397 if (!part) {
398 stm32prog_err("Layout: alloc failed");
399 return -ENOMEM;
400 }
401 data->part_array = part;
402
403
404 i = 1;
405 eof = false;
406 p = start;
407 col = start;
408 end_of_line = false;
409 while (!eof) {
410 switch (*p) {
411
412 case '\r':
413 *p = '\0';
414 p++;
415 continue;
416 case '\0':
417 end_of_line = true;
418 eof = true;
419 break;
420 case '\n':
421 end_of_line = true;
422 break;
423 case '\t':
424 break;
425 case '#':
426
427 if (column == 0 && p == col) {
428 while ((p < last) && *p)
429 if (*p++ == '\n')
430 break;
431 col = p;
432 i++;
433 if (p >= last || !*p) {
434 eof = true;
435 end_of_line = true;
436 }
437 continue;
438 }
439
440
441 default:
442 p++;
443 continue;
444 }
445
446
447 *p = '\0';
448 p++;
449 if (p >= last) {
450 eof = true;
451 end_of_line = true;
452 }
453
454
455 if (strlen(col) == 0) {
456 col = p;
457
458 if (column == 0 && end_of_line) {
459 end_of_line = false;
460 i++;
461 }
462 continue;
463 }
464
465 if (column < COL_NB_STM32) {
466 ret = parse[column](data, i, col, part);
467 if (ret)
468 return ret;
469 }
470
471
472 column++;
473 col = p;
474
475 if (!end_of_line)
476 continue;
477
478
479 end_of_line = false;
480
481 if (column < COL_NB_STM32) {
482 stm32prog_err("Layout line %d: no enought column", i);
483 return -EINVAL;
484 }
485 column = 0;
486 part_nb++;
487 part++;
488 i++;
489 if (part_nb >= part_list_size) {
490 part = NULL;
491 if (!eof) {
492 stm32prog_err("Layout: no enought memory for %d part",
493 part_nb);
494 return -EINVAL;
495 }
496 }
497 }
498 data->part_nb = part_nb;
499 if (data->part_nb == 0) {
500 stm32prog_err("Layout: no partition found");
501 return -ENODEV;
502 }
503
504 return 0;
505}
506
507static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
508{
509 struct stm32prog_part_t *parta, *partb;
510
511 parta = container_of(a, struct stm32prog_part_t, list);
512 partb = container_of(b, struct stm32prog_part_t, list);
513
514 if (parta->part_id != partb->part_id)
515 return parta->part_id - partb->part_id;
516 else
517 return parta->addr > partb->addr ? 1 : -1;
518}
519
520static void get_mtd_by_target(char *string, enum stm32prog_target target,
521 int dev_id)
522{
523 const char *dev_str;
524
525 switch (target) {
526 case STM32PROG_NOR:
527 dev_str = "nor";
528 break;
529 case STM32PROG_NAND:
530 dev_str = "nand";
531 break;
532 case STM32PROG_SPI_NAND:
533 dev_str = "spi-nand";
534 break;
535 default:
536 dev_str = "invalid";
537 break;
538 }
539 sprintf(string, "%s%d", dev_str, dev_id);
540}
541
542static int init_device(struct stm32prog_data *data,
543 struct stm32prog_dev_t *dev)
544{
545 struct mmc *mmc = NULL;
546 struct blk_desc *block_dev = NULL;
547 struct mtd_info *mtd = NULL;
548 char mtd_id[16];
549 int part_id;
550 int ret;
551 u64 first_addr = 0, last_addr = 0;
552 struct stm32prog_part_t *part, *next_part;
553 u64 part_addr, part_size;
554 bool part_found;
555 const char *part_name;
556
557 switch (dev->target) {
558 case STM32PROG_MMC:
559 if (!IS_ENABLED(CONFIG_MMC)) {
560 stm32prog_err("unknown device type = %d", dev->target);
561 return -ENODEV;
562 }
563 mmc = find_mmc_device(dev->dev_id);
564 if (!mmc || mmc_init(mmc)) {
565 stm32prog_err("mmc device %d not found", dev->dev_id);
566 return -ENODEV;
567 }
568 block_dev = mmc_get_blk_desc(mmc);
569 if (!block_dev) {
570 stm32prog_err("mmc device %d not probed", dev->dev_id);
571 return -ENODEV;
572 }
573 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
574 dev->mmc = mmc;
575
576
577 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
578 first_addr = dev->erase_size;
579 last_addr = (u64)(block_dev->lba -
580 mmc->erase_grp_size) *
581 block_dev->blksz;
582 } else {
583 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
584 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
585 block_dev->blksz;
586 }
587 pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
588 block_dev->lba, block_dev->blksz);
589 pr_debug(" available address = 0x%llx..0x%llx\n",
590 first_addr, last_addr);
591 pr_debug(" full_update = %d\n", dev->full_update);
592 break;
593 case STM32PROG_NOR:
594 case STM32PROG_NAND:
595 case STM32PROG_SPI_NAND:
596 if (!IS_ENABLED(CONFIG_MTD)) {
597 stm32prog_err("unknown device type = %d", dev->target);
598 return -ENODEV;
599 }
600 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
601 pr_debug("%s\n", mtd_id);
602
603 mtdparts_init();
604 mtd = get_mtd_device_nm(mtd_id);
605 if (IS_ERR(mtd)) {
606 stm32prog_err("MTD device %s not found", mtd_id);
607 return -ENODEV;
608 }
609 first_addr = 0;
610 last_addr = mtd->size;
611 dev->erase_size = mtd->erasesize;
612 pr_debug("MTD device %s: size=%lld erasesize=%d\n",
613 mtd_id, mtd->size, mtd->erasesize);
614 pr_debug(" available address = 0x%llx..0x%llx\n",
615 first_addr, last_addr);
616 dev->mtd = mtd;
617 break;
618 case STM32PROG_RAM:
619 first_addr = gd->bd->bi_dram[0].start;
620 last_addr = first_addr + gd->bd->bi_dram[0].size;
621 dev->erase_size = 1;
622 break;
623 default:
624 stm32prog_err("unknown device type = %d", dev->target);
625 return -ENODEV;
626 }
627 pr_debug(" erase size = 0x%x\n", dev->erase_size);
628 pr_debug(" full_update = %d\n", dev->full_update);
629
630
631 list_sort(NULL, &dev->part_list, &part_cmp);
632 part_id = 1;
633 pr_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
634 list_for_each_entry(part, &dev->part_list, list) {
635 if (part->bin_nb > 1) {
636 if ((dev->target != STM32PROG_NAND &&
637 dev->target != STM32PROG_SPI_NAND) ||
638 part->id >= PHASE_FIRST_USER ||
639 strncmp(part->name, "fsbl", 4)) {
640 stm32prog_err("%s (0x%x): multiple binary %d not supported",
641 part->name, part->id,
642 part->bin_nb);
643 return -EINVAL;
644 }
645 }
646 if (part->part_type == RAW_IMAGE) {
647 part->part_id = 0x0;
648 part->addr = 0x0;
649 if (block_dev)
650 part->size = block_dev->lba * block_dev->blksz;
651 else
652 part->size = last_addr;
653 pr_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
654 part->option, part->id, part->name,
655 part->part_type, part->bin_nb, part->target,
656 part->dev_id, part->addr, part->size);
657 continue;
658 }
659 if (part->part_id < 0) {
660 if (mmc) {
661 part->size = mmc->capacity_boot;
662 } else {
663 stm32prog_err("%s (0x%x): hw partition not expected : %d",
664 part->name, part->id,
665 part->part_id);
666 return -ENODEV;
667 }
668 } else {
669 part->part_id = part_id++;
670
671
672 if (part->list.next != &dev->part_list) {
673 next_part =
674 container_of(part->list.next,
675 struct stm32prog_part_t,
676 list);
677 if (part->addr < next_part->addr) {
678 part->size = next_part->addr -
679 part->addr;
680 } else {
681 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
682 part->name, part->id,
683 part->addr,
684 next_part->name,
685 next_part->id,
686 next_part->addr);
687 return -EINVAL;
688 }
689 } else {
690 if (part->addr <= last_addr) {
691 part->size = last_addr - part->addr;
692 } else {
693 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
694 part->name, part->id,
695 part->addr, last_addr);
696 return -EINVAL;
697 }
698 }
699 if (part->addr < first_addr) {
700 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
701 part->name, part->id,
702 part->addr, first_addr);
703 return -EINVAL;
704 }
705 }
706 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
707 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
708 part->name, part->id, part->addr,
709 part->dev->erase_size);
710 return -EINVAL;
711 }
712 pr_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
713 part->part_id, part->option, part->id, part->name,
714 part->part_type, part->bin_nb, part->target,
715 part->dev_id, part->addr, part->size);
716
717 part_addr = 0;
718 part_size = 0;
719 part_found = false;
720
721
722 if (block_dev) {
723
724
725
726
727
728 if (dev->full_update || part->part_id < 0) {
729 pr_debug("\n");
730 continue;
731 }
732 struct disk_partition partinfo;
733
734 ret = part_get_info(block_dev, part->part_id,
735 &partinfo);
736
737 if (ret) {
738 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
739 part->name, part->id,
740 part_id, part->dev_id);
741 return -ENODEV;
742 }
743 part_addr = (u64)partinfo.start * partinfo.blksz;
744 part_size = (u64)partinfo.size * partinfo.blksz;
745 part_name = (char *)partinfo.name;
746 part_found = true;
747 }
748
749 if (IS_ENABLED(CONFIG_MTD) && mtd) {
750 char mtd_part_id[32];
751 struct part_info *mtd_part;
752 struct mtd_device *mtd_dev;
753 u8 part_num;
754
755 sprintf(mtd_part_id, "%s,%d", mtd_id,
756 part->part_id - 1);
757 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
758 &part_num, &mtd_part);
759 if (ret != 0) {
760 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
761 part->name, part->id,
762 mtd_part_id);
763 return -ENODEV;
764 }
765 part_addr = mtd_part->offset;
766 part_size = mtd_part->size;
767 part_name = mtd_part->name;
768 part_found = true;
769 }
770
771
772 if (!part_found) {
773 pr_debug("\n");
774 continue;
775 }
776
777 pr_debug(" %08llx %08llx\n", part_addr, part_size);
778
779 if (part->addr != part_addr) {
780 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
781 part->name, part->id, part->part_id,
782 part_name, part->addr, part_addr);
783 return -ENODEV;
784 }
785 if (part->size != part_size) {
786 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
787 part->name, part->id, part->part_id,
788 part_name, part->addr, part->size,
789 part_size);
790 return -ENODEV;
791 }
792 }
793 return 0;
794}
795
796static int treat_partition_list(struct stm32prog_data *data)
797{
798 int i, j;
799 struct stm32prog_part_t *part;
800
801 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
802 data->dev[j].target = STM32PROG_NONE;
803 INIT_LIST_HEAD(&data->dev[j].part_list);
804 }
805
806 data->tee_detected = false;
807 data->fsbl_nor_detected = false;
808 for (i = 0; i < data->part_nb; i++) {
809 part = &data->part_array[i];
810 part->alt_id = -1;
811
812
813 if (part->target == STM32PROG_NONE) {
814 if (IS_SELECT(part)) {
815 stm32prog_err("Layout: selected none phase = 0x%x",
816 part->id);
817 return -EINVAL;
818 }
819 continue;
820 }
821
822 if (part->id == PHASE_FLASHLAYOUT ||
823 part->id > PHASE_LAST_USER) {
824 stm32prog_err("Layout: invalid phase = 0x%x",
825 part->id);
826 return -EINVAL;
827 }
828 for (j = i + 1; j < data->part_nb; j++) {
829 if (part->id == data->part_array[j].id) {
830 stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
831 part->id, i, j);
832 return -EINVAL;
833 }
834 }
835 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
836 if (data->dev[j].target == STM32PROG_NONE) {
837
838 data->dev[j].target = part->target;
839 data->dev[j].dev_id = part->dev_id;
840 data->dev[j].full_update = true;
841 data->dev_nb++;
842 break;
843 } else if ((part->target == data->dev[j].target) &&
844 (part->dev_id == data->dev[j].dev_id)) {
845 break;
846 }
847 }
848 if (j == STM32PROG_MAX_DEV) {
849 stm32prog_err("Layout: too many device");
850 return -EINVAL;
851 }
852 switch (part->target) {
853 case STM32PROG_NOR:
854 if (!data->fsbl_nor_detected &&
855 !strncmp(part->name, "fsbl", 4))
856 data->fsbl_nor_detected = true;
857
858 case STM32PROG_NAND:
859 case STM32PROG_SPI_NAND:
860 if (!data->tee_detected &&
861 !strncmp(part->name, "tee", 3))
862 data->tee_detected = true;
863 break;
864 default:
865 break;
866 }
867 part->dev = &data->dev[j];
868 if (!IS_SELECT(part))
869 part->dev->full_update = false;
870 list_add_tail(&part->list, &data->dev[j].part_list);
871 }
872
873 return 0;
874}
875
876static int create_gpt_partitions(struct stm32prog_data *data)
877{
878 int offset = 0;
879 const int buflen = SZ_8K;
880 char *buf;
881 char uuid[UUID_STR_LEN + 1];
882 unsigned char *uuid_bin;
883 unsigned int mmc_id;
884 int i;
885 bool rootfs_found;
886 struct stm32prog_part_t *part;
887
888 buf = malloc(buflen);
889 if (!buf)
890 return -ENOMEM;
891
892 puts("partitions : ");
893
894 for (i = 0; i < data->dev_nb; i++) {
895
896 if (data->dev[i].target != STM32PROG_MMC ||
897 !data->dev[i].full_update)
898 continue;
899
900 offset = 0;
901 rootfs_found = false;
902 memset(buf, 0, buflen);
903
904 list_for_each_entry(part, &data->dev[i].part_list, list) {
905
906 if (part->part_id < 0)
907 continue;
908
909 if (part->part_type == RAW_IMAGE)
910 continue;
911
912 if (offset + 100 > buflen) {
913 pr_debug("\n%s: buffer too small, %s skippped",
914 __func__, part->name);
915 continue;
916 }
917
918 if (!offset)
919 offset += sprintf(buf, "gpt write mmc %d \"",
920 data->dev[i].dev_id);
921
922 offset += snprintf(buf + offset, buflen - offset,
923 "name=%s,start=0x%llx,size=0x%llx",
924 part->name,
925 part->addr,
926 part->size);
927
928 if (part->part_type == PART_BINARY)
929 offset += snprintf(buf + offset,
930 buflen - offset,
931 ",type="
932 LINUX_RESERVED_UUID);
933 else
934 offset += snprintf(buf + offset,
935 buflen - offset,
936 ",type=linux");
937
938 if (part->part_type == PART_SYSTEM)
939 offset += snprintf(buf + offset,
940 buflen - offset,
941 ",bootable");
942
943 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
944 mmc_id = part->dev_id;
945 rootfs_found = true;
946 if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
947 uuid_bin =
948 (unsigned char *)uuid_mmc[mmc_id].b;
949 uuid_bin_to_str(uuid_bin, uuid,
950 UUID_STR_FORMAT_GUID);
951 offset += snprintf(buf + offset,
952 buflen - offset,
953 ",uuid=%s", uuid);
954 }
955 }
956
957 offset += snprintf(buf + offset, buflen - offset, ";");
958 }
959
960 if (offset) {
961 offset += snprintf(buf + offset, buflen - offset, "\"");
962 pr_debug("\ncmd: %s\n", buf);
963 if (run_command(buf, 0)) {
964 stm32prog_err("GPT partitionning fail: %s",
965 buf);
966 free(buf);
967
968 return -1;
969 }
970 }
971
972 if (data->dev[i].mmc)
973 part_init(mmc_get_blk_desc(data->dev[i].mmc));
974
975#ifdef DEBUG
976 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
977 pr_debug("\ncmd: %s", buf);
978 if (run_command(buf, 0))
979 printf("fail !\n");
980 else
981 printf("OK\n");
982
983 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
984 run_command(buf, 0);
985#endif
986 }
987 puts("done\n");
988
989#ifdef DEBUG
990 run_command("mtd list", 0);
991#endif
992 free(buf);
993
994 return 0;
995}
996
997static int stm32prog_alt_add(struct stm32prog_data *data,
998 struct dfu_entity *dfu,
999 struct stm32prog_part_t *part)
1000{
1001 int ret = 0;
1002 int offset = 0;
1003 char devstr[10];
1004 char dfustr[10];
1005 char buf[ALT_BUF_LEN];
1006 u32 size;
1007 char multiplier, type;
1008
1009
1010 if (part->size > SZ_1M) {
1011 size = (u32)(part->size / SZ_1M);
1012 multiplier = 'M';
1013 } else if (part->size > SZ_1K) {
1014 size = (u32)(part->size / SZ_1K);
1015 multiplier = 'K';
1016 } else {
1017 size = (u32)part->size;
1018 multiplier = 'B';
1019 }
1020 if (IS_SELECT(part) && !IS_EMPTY(part))
1021 type = 'e';
1022 else
1023 type = 'a';
1024
1025 memset(buf, 0, sizeof(buf));
1026 offset = snprintf(buf, ALT_BUF_LEN - offset,
1027 "@%s/0x%02x/1*%d%c%c ",
1028 part->name, part->id,
1029 size, multiplier, type);
1030
1031 if (part->target == STM32PROG_RAM) {
1032 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1033 "ram 0x%llx 0x%llx",
1034 part->addr, part->size);
1035 } else if (part->part_type == RAW_IMAGE) {
1036 u64 dfu_size;
1037
1038 if (part->dev->target == STM32PROG_MMC)
1039 dfu_size = part->size / part->dev->mmc->read_bl_len;
1040 else
1041 dfu_size = part->size;
1042 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1043 "raw 0x0 0x%llx", dfu_size);
1044 } else if (part->part_id < 0) {
1045 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1046
1047 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1048 "raw 0x%llx 0x%llx",
1049 part->addr, nb_blk);
1050 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1051 " mmcpart %d;", -(part->part_id));
1052 } else {
1053 if (part->part_type == PART_SYSTEM &&
1054 (part->target == STM32PROG_NAND ||
1055 part->target == STM32PROG_NOR ||
1056 part->target == STM32PROG_SPI_NAND))
1057 offset += snprintf(buf + offset,
1058 ALT_BUF_LEN - offset,
1059 "partubi");
1060 else
1061 offset += snprintf(buf + offset,
1062 ALT_BUF_LEN - offset,
1063 "part");
1064
1065 if (part->target == STM32PROG_MMC)
1066 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1067 " %d", part->dev_id);
1068 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1069 " %d;", part->part_id);
1070 }
1071 ret = -ENODEV;
1072 switch (part->target) {
1073 case STM32PROG_MMC:
1074 if (IS_ENABLED(CONFIG_MMC)) {
1075 ret = 0;
1076 sprintf(dfustr, "mmc");
1077 sprintf(devstr, "%d", part->dev_id);
1078 }
1079 break;
1080 case STM32PROG_NAND:
1081 case STM32PROG_NOR:
1082 case STM32PROG_SPI_NAND:
1083 if (IS_ENABLED(CONFIG_MTD)) {
1084 ret = 0;
1085 sprintf(dfustr, "mtd");
1086 get_mtd_by_target(devstr, part->target, part->dev_id);
1087 }
1088 break;
1089 case STM32PROG_RAM:
1090 ret = 0;
1091 sprintf(dfustr, "ram");
1092 sprintf(devstr, "0");
1093 break;
1094 default:
1095 break;
1096 }
1097 if (ret) {
1098 stm32prog_err("invalid target: %d", part->target);
1099 return ret;
1100 }
1101 pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1102 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1103 pr_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1104 dfustr, devstr, buf, ret);
1105
1106 return ret;
1107}
1108
1109static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1110 char *name, int phase, int size)
1111{
1112 int ret = 0;
1113 char devstr[4];
1114 char buf[ALT_BUF_LEN];
1115
1116 sprintf(devstr, "%d", phase);
1117 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1118 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1119 pr_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1120
1121 return ret;
1122}
1123
1124static int dfu_init_entities(struct stm32prog_data *data)
1125{
1126 int ret = 0;
1127 int phase, i, alt_id;
1128 struct stm32prog_part_t *part;
1129 struct dfu_entity *dfu;
1130 int alt_nb;
1131
1132 alt_nb = 3;
1133 if (data->part_nb == 0)
1134 alt_nb++;
1135 else
1136 for (i = 0; i < data->part_nb; i++) {
1137 if (data->part_array[i].target != STM32PROG_NONE)
1138 alt_nb++;
1139 }
1140
1141 if (dfu_alt_init(alt_nb, &dfu))
1142 return -ENODEV;
1143
1144 puts("DFU alt info setting: ");
1145 if (data->part_nb) {
1146 alt_id = 0;
1147 for (phase = 1;
1148 (phase <= PHASE_LAST_USER) &&
1149 (alt_id < alt_nb) && !ret;
1150 phase++) {
1151
1152 part = NULL;
1153 for (i = 0; i < data->part_nb; i++) {
1154 if (phase == data->part_array[i].id) {
1155 part = &data->part_array[i];
1156 break;
1157 }
1158 }
1159 if (!part)
1160 continue;
1161 if (part->target == STM32PROG_NONE)
1162 continue;
1163 part->alt_id = alt_id;
1164 alt_id++;
1165
1166 ret = stm32prog_alt_add(data, dfu, part);
1167 }
1168 } else {
1169 char buf[ALT_BUF_LEN];
1170
1171 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1172 PHASE_FLASHLAYOUT, STM32_DDR_BASE);
1173 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1174 pr_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1175 }
1176
1177 if (!ret)
1178 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
1179
1180 if (!ret)
1181 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
1182
1183 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1184 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
1185
1186 if (ret)
1187 stm32prog_err("dfu init failed: %d", ret);
1188 puts("done\n");
1189
1190#ifdef DEBUG
1191 dfu_show_entities();
1192#endif
1193 return ret;
1194}
1195
1196int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1197 long *size)
1198{
1199 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1200
1201 if (!data->otp_part) {
1202 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1203 if (!data->otp_part)
1204 return -ENOMEM;
1205 }
1206
1207 if (!offset)
1208 memset(data->otp_part, 0, OTP_SIZE);
1209
1210 if (offset + *size > OTP_SIZE)
1211 *size = OTP_SIZE - offset;
1212
1213 memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
1214
1215 return 0;
1216}
1217
1218int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1219 long *size)
1220{
1221 int result = 0;
1222
1223 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1224 stm32prog_err("OTP update not supported");
1225
1226 return -1;
1227 }
1228
1229 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1230
1231 if (!offset) {
1232 if (!data->otp_part)
1233 data->otp_part =
1234 memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
1235
1236 if (!data->otp_part) {
1237 result = -ENOMEM;
1238 goto end_otp_read;
1239 }
1240
1241
1242 memset(data->otp_part, 0, OTP_SIZE);
1243
1244
1245 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1246 (u32)data->otp_part, 0);
1247 if (result)
1248 goto end_otp_read;
1249 }
1250
1251 if (!data->otp_part) {
1252 result = -ENOMEM;
1253 goto end_otp_read;
1254 }
1255
1256 if (offset + *size > OTP_SIZE)
1257 *size = OTP_SIZE - offset;
1258 memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
1259
1260end_otp_read:
1261 pr_debug("%s: result %i\n", __func__, result);
1262
1263 return result;
1264}
1265
1266int stm32prog_otp_start(struct stm32prog_data *data)
1267{
1268 int result = 0;
1269 struct arm_smccc_res res;
1270
1271 if (!IS_ENABLED(CONFIG_ARM_SMCCC)) {
1272 stm32prog_err("OTP update not supported");
1273
1274 return -1;
1275 }
1276
1277 if (!data->otp_part) {
1278 stm32prog_err("start OTP without data");
1279 return -1;
1280 }
1281
1282 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1283 (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
1284
1285 if (!res.a0) {
1286 switch (res.a1) {
1287 case 0:
1288 result = 0;
1289 break;
1290 case 1:
1291 stm32prog_err("Provisioning");
1292 result = 0;
1293 break;
1294 default:
1295 pr_err("%s: OTP incorrect value (err = %ld)\n",
1296 __func__, res.a1);
1297 result = -EINVAL;
1298 break;
1299 }
1300 } else {
1301 pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1302 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1303 result = -EINVAL;
1304 }
1305
1306 free(data->otp_part);
1307 data->otp_part = NULL;
1308 pr_debug("%s: result %i\n", __func__, result);
1309
1310 return result;
1311}
1312
1313int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1314 long *size)
1315{
1316 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1317
1318 if (!offset)
1319 memset(data->pmic_part, 0, PMIC_SIZE);
1320
1321 if (offset + *size > PMIC_SIZE)
1322 *size = PMIC_SIZE - offset;
1323
1324 memcpy(&data->pmic_part[offset], buffer, *size);
1325
1326 return 0;
1327}
1328
1329int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1330 long *size)
1331{
1332 int result = 0, ret;
1333 struct udevice *dev;
1334
1335 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1336 stm32prog_err("PMIC update not supported");
1337
1338 return -EOPNOTSUPP;
1339 }
1340
1341 pr_debug("%s: %x %lx\n", __func__, offset, *size);
1342 ret = uclass_get_device_by_driver(UCLASS_MISC,
1343 DM_GET_DRIVER(stpmic1_nvm),
1344 &dev);
1345 if (ret)
1346 return ret;
1347
1348
1349 if (!offset) {
1350
1351 memset(data->pmic_part, 0, PMIC_SIZE);
1352
1353 ret = uclass_get_device_by_driver(UCLASS_MISC,
1354 DM_GET_DRIVER(stpmic1_nvm),
1355 &dev);
1356 if (ret)
1357 return ret;
1358
1359 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1360 if (ret < 0) {
1361 result = ret;
1362 goto end_pmic_read;
1363 }
1364 if (ret != PMIC_SIZE) {
1365 result = -EACCES;
1366 goto end_pmic_read;
1367 }
1368 }
1369
1370 if (offset + *size > PMIC_SIZE)
1371 *size = PMIC_SIZE - offset;
1372
1373 memcpy(buffer, &data->pmic_part[offset], *size);
1374
1375end_pmic_read:
1376 pr_debug("%s: result %i\n", __func__, result);
1377 return result;
1378}
1379
1380int stm32prog_pmic_start(struct stm32prog_data *data)
1381{
1382 int ret;
1383 struct udevice *dev;
1384
1385 if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
1386 stm32prog_err("PMIC update not supported");
1387
1388 return -EOPNOTSUPP;
1389 }
1390
1391 ret = uclass_get_device_by_driver(UCLASS_MISC,
1392 DM_GET_DRIVER(stpmic1_nvm),
1393 &dev);
1394 if (ret)
1395 return ret;
1396
1397 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1398}
1399
1400
1401static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1402{
1403 int ret, i;
1404 void *fsbl;
1405 struct image_header_s header;
1406 struct raw_header_s raw_header;
1407 struct dfu_entity *dfu;
1408 long size, offset;
1409
1410 if (part->target != STM32PROG_NAND &&
1411 part->target != STM32PROG_SPI_NAND)
1412 return -1;
1413
1414 dfu = dfu_get_entity(part->alt_id);
1415
1416
1417 dfu_transaction_cleanup(dfu);
1418 size = BL_HEADER_SIZE;
1419 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1420 if (ret)
1421 return ret;
1422 if (stm32prog_header_check(&raw_header, &header))
1423 return -1;
1424
1425
1426 size = header.image_length + BL_HEADER_SIZE;
1427 size = round_up(size, part->dev->mtd->erasesize);
1428 fsbl = calloc(1, size);
1429 if (!fsbl)
1430 return -ENOMEM;
1431 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1432 pr_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1433 if (ret)
1434 goto error;
1435
1436 dfu_transaction_cleanup(dfu);
1437 offset = 0;
1438 for (i = part->bin_nb - 1; i > 0; i--) {
1439 offset += size;
1440
1441 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1442 pr_debug("%s copy at ofset=%lx size=%lx ret=%d",
1443 __func__, offset, size, ret);
1444 if (ret)
1445 goto error;
1446 }
1447
1448error:
1449 free(fsbl);
1450 return ret;
1451}
1452
1453static void stm32prog_end_phase(struct stm32prog_data *data)
1454{
1455 if (data->phase == PHASE_FLASHLAYOUT) {
1456 if (parse_flash_layout(data, STM32_DDR_BASE, 0))
1457 stm32prog_err("Layout: invalid FlashLayout");
1458 return;
1459 }
1460
1461 if (!data->cur_part)
1462 return;
1463
1464 if (data->cur_part->target == STM32PROG_RAM) {
1465 if (data->cur_part->part_type == PART_SYSTEM)
1466 data->uimage = data->cur_part->addr;
1467 if (data->cur_part->part_type == PART_FILESYSTEM)
1468 data->dtb = data->cur_part->addr;
1469 }
1470
1471 if (CONFIG_IS_ENABLED(MMC) &&
1472 data->cur_part->part_id < 0) {
1473 char cmdbuf[60];
1474
1475 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1476 data->cur_part->dev_id, data->cur_part->dev_id,
1477 -(data->cur_part->part_id));
1478 if (run_command(cmdbuf, 0)) {
1479 stm32prog_err("commands '%s' failed", cmdbuf);
1480 return;
1481 }
1482 }
1483
1484 if (CONFIG_IS_ENABLED(MTD) &&
1485 data->cur_part->bin_nb > 1) {
1486 if (stm32prog_copy_fsbl(data->cur_part)) {
1487 stm32prog_err("%s (0x%x): copy of fsbl failed",
1488 data->cur_part->name, data->cur_part->id);
1489 return;
1490 }
1491 }
1492}
1493
1494void stm32prog_do_reset(struct stm32prog_data *data)
1495{
1496 if (data->phase == PHASE_RESET) {
1497 data->phase = PHASE_DO_RESET;
1498 puts("Reset requested\n");
1499 }
1500}
1501
1502void stm32prog_next_phase(struct stm32prog_data *data)
1503{
1504 int phase, i;
1505 struct stm32prog_part_t *part;
1506 bool found;
1507
1508 phase = data->phase;
1509 switch (phase) {
1510 case PHASE_RESET:
1511 case PHASE_END:
1512 case PHASE_DO_RESET:
1513 return;
1514 }
1515
1516
1517 data->dfu_seq = 0;
1518 data->cur_part = NULL;
1519 data->phase = PHASE_END;
1520 found = false;
1521 do {
1522 phase++;
1523 if (phase > PHASE_LAST_USER)
1524 break;
1525 for (i = 0; i < data->part_nb; i++) {
1526 part = &data->part_array[i];
1527 if (part->id == phase) {
1528 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1529 data->cur_part = part;
1530 data->phase = phase;
1531 found = true;
1532 }
1533 break;
1534 }
1535 }
1536 } while (!found);
1537
1538 if (data->phase == PHASE_END)
1539 puts("Phase=END\n");
1540}
1541
1542static int part_delete(struct stm32prog_data *data,
1543 struct stm32prog_part_t *part)
1544{
1545 int ret = 0;
1546 unsigned long blks, blks_offset, blks_size;
1547 struct blk_desc *block_dev = NULL;
1548 char cmdbuf[40];
1549 char devstr[10];
1550
1551 printf("Erasing %s ", part->name);
1552 switch (part->target) {
1553 case STM32PROG_MMC:
1554 if (!IS_ENABLED(CONFIG_MMC)) {
1555 ret = -1;
1556 stm32prog_err("%s (0x%x): erase invalid",
1557 part->name, part->id);
1558 break;
1559 }
1560 printf("on mmc %d: ", part->dev->dev_id);
1561 block_dev = mmc_get_blk_desc(part->dev->mmc);
1562 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1563 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1564
1565
1566
1567 if (part->part_id < 0)
1568 if (blk_select_hwpart_devnum(IF_TYPE_MMC,
1569 part->dev->dev_id,
1570 -part->part_id))
1571 return -1;
1572
1573 blks = blk_derase(block_dev, blks_offset, blks_size);
1574
1575
1576 if (part->part_id < 0)
1577 blk_select_hwpart_devnum(IF_TYPE_MMC,
1578 part->dev->dev_id, 0);
1579 if (blks != blks_size) {
1580 ret = -1;
1581 stm32prog_err("%s (0x%x): MMC erase failed",
1582 part->name, part->id);
1583 }
1584 break;
1585 case STM32PROG_NOR:
1586 case STM32PROG_NAND:
1587 case STM32PROG_SPI_NAND:
1588 if (!IS_ENABLED(CONFIG_MTD)) {
1589 ret = -1;
1590 stm32prog_err("%s (0x%x): erase invalid",
1591 part->name, part->id);
1592 break;
1593 }
1594 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1595 printf("on %s: ", devstr);
1596 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1597 devstr, part->addr, part->size);
1598 if (run_command(cmdbuf, 0)) {
1599 ret = -1;
1600 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1601 part->name, part->id, cmdbuf);
1602 }
1603 break;
1604 case STM32PROG_RAM:
1605 printf("on ram: ");
1606 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1607 break;
1608 default:
1609 ret = -1;
1610 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1611 break;
1612 }
1613 if (!ret)
1614 printf("done\n");
1615
1616 return ret;
1617}
1618
1619static void stm32prog_devices_init(struct stm32prog_data *data)
1620{
1621 int i;
1622 int ret;
1623 struct stm32prog_part_t *part;
1624
1625 ret = treat_partition_list(data);
1626 if (ret)
1627 goto error;
1628
1629
1630 for (i = 0; i < data->dev_nb; i++) {
1631 ret = init_device(data, &data->dev[i]);
1632 if (ret)
1633 goto error;
1634 }
1635
1636
1637 for (i = 0; i < data->part_nb; i++) {
1638 part = &data->part_array[i];
1639
1640 if (part->part_type != RAW_IMAGE)
1641 continue;
1642
1643 if (!IS_SELECT(part) || !IS_DELETE(part))
1644 continue;
1645
1646 ret = part_delete(data, part);
1647 if (ret)
1648 goto error;
1649 }
1650
1651 if (IS_ENABLED(CONFIG_MMC)) {
1652 ret = create_gpt_partitions(data);
1653 if (ret)
1654 goto error;
1655 }
1656
1657
1658 for (i = 0; i < data->part_nb; i++) {
1659 part = &data->part_array[i];
1660
1661 if (part->part_type == RAW_IMAGE)
1662 continue;
1663
1664 if (!IS_SELECT(part) || !IS_DELETE(part))
1665 continue;
1666
1667 ret = part_delete(data, part);
1668 if (ret)
1669 goto error;
1670 }
1671
1672 return;
1673
1674error:
1675 data->part_nb = 0;
1676}
1677
1678int stm32prog_dfu_init(struct stm32prog_data *data)
1679{
1680
1681 if (data->part_nb)
1682 stm32prog_devices_init(data);
1683
1684 if (data->part_nb)
1685 stm32prog_next_phase(data);
1686
1687
1688 dfu_free_entities();
1689 return dfu_init_entities(data);
1690}
1691
1692int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
1693{
1694 memset(data, 0x0, sizeof(*data));
1695 data->read_phase = PHASE_RESET;
1696 data->phase = PHASE_FLASHLAYOUT;
1697
1698 return parse_flash_layout(data, addr, size);
1699}
1700
1701void stm32prog_clean(struct stm32prog_data *data)
1702{
1703
1704 dfu_free_entities();
1705 free(data->part_array);
1706 free(data->otp_part);
1707 free(data->buffer);
1708 free(data->header_data);
1709}
1710
1711
1712void dfu_flush_callback(struct dfu_entity *dfu)
1713{
1714 if (!stm32prog_data)
1715 return;
1716
1717 if (dfu->dev_type == DFU_DEV_VIRT) {
1718 if (dfu->data.virt.dev_num == PHASE_OTP)
1719 stm32prog_otp_start(stm32prog_data);
1720 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1721 stm32prog_pmic_start(stm32prog_data);
1722 return;
1723 }
1724
1725 if (dfu->dev_type == DFU_DEV_RAM) {
1726 if (dfu->alt == 0 &&
1727 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
1728 stm32prog_end_phase(stm32prog_data);
1729
1730 }
1731 }
1732
1733 if (!stm32prog_data->cur_part)
1734 return;
1735
1736 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1737 stm32prog_end_phase(stm32prog_data);
1738 stm32prog_next_phase(stm32prog_data);
1739 }
1740}
1741
1742void dfu_initiated_callback(struct dfu_entity *dfu)
1743{
1744 if (!stm32prog_data)
1745 return;
1746
1747 if (!stm32prog_data->cur_part)
1748 return;
1749
1750
1751 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
1752 dfu->offset = stm32prog_data->offset;
1753 stm32prog_data->dfu_seq = 0;
1754 pr_debug("dfu offset = 0x%llx\n", dfu->offset);
1755 }
1756}
1757
