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8#ifndef _BRASWELL_GPIO_H_
9#define _BRASWELL_GPIO_H_
10
11#include <asm/arch/iomap.h>
12
13enum mode_list {
14 M0,
15 M1,
16 M2,
17 M3,
18 M4,
19 M5,
20 M6,
21 M7,
22 M8,
23 M9,
24 M10,
25 M11,
26 M12,
27 M13,
28};
29
30enum int_select {
31 L0,
32 L1,
33 L2,
34 L3,
35 L4,
36 L5,
37 L6,
38 L7,
39 L8,
40 L9,
41 L10,
42 L11,
43 L12,
44 L13,
45 L14,
46 L15,
47};
48
49enum gpio_en {
50 NATIVE = 0xff,
51 GPIO = 0,
52 GPO = 1,
53 GPI = 2,
54 HI_Z = 3,
55 NA_GPO = 0,
56};
57
58enum gpio_state {
59 LOW,
60 HIGH,
61};
62
63enum en_dis {
64 DISABLE,
65 ENABLE,
66};
67
68enum int_type {
69 INT_DIS,
70 TRIG_EDGE_LOW,
71 TRIG_EDGE_HIGH,
72 TRIG_EDGE_BOTH,
73 TRIG_LEVEL,
74};
75
76enum mask {
77 MASKABLE,
78 NON_MASKABLE,
79};
80
81enum glitch_cfg {
82 GLITCH_DISABLE,
83 EN_EDGE_DETECT,
84 EN_RX_DATA,
85 EN_EDGE_RX_DATA,
86};
87
88enum inv_rx_tx {
89 NO_INVERSION = 0,
90 INV_RX_ENABLE = 1,
91 INV_TX_ENABLE = 2,
92 INV_RX_TX_ENABLE = 3,
93 INV_RX_DATA = 4,
94 INV_TX_DATA = 8,
95};
96
97enum voltage {
98 VOLT_3_3,
99 VOLT_1_8,
100};
101
102enum hs_mode {
103 DISABLE_HS,
104 ENABLE_HS,
105};
106
107enum odt_up_dn {
108 PULL_UP,
109 PULL_DOWN,
110};
111
112enum odt_en {
113 DISABLE_OD,
114 ENABLE_OD,
115};
116
117enum pull_type {
118 P_NONE = 0,
119 P_20K_L = 1,
120 P_5K_L = 2,
121 P_1K_L = 4,
122 P_20K_H = 9,
123 P_5K_H = 10,
124 P_1K_H = 12
125};
126
127enum bit {
128 ONE_BIT = 1,
129 TWO_BIT = 3,
130 THREE_BIT = 7,
131 FOUR_BIT = 15,
132 FIVE_BIT = 31,
133 SIX_BIT = 63,
134 SEVEN_BIT = 127,
135 EIGHT_BIT = 255
136};
137
138enum gpe_config {
139 GPE,
140 SMI,
141 SCI,
142};
143
144enum community {
145 SOUTHWEST = 0x0000,
146 NORTH = 0x8000,
147 EAST = 0x10000,
148 SOUTHEAST = 0x18000,
149 VIRTUAL = 0x20000,
150};
151
152#define NA 0xff
153#define TERMINATOR 0xffffffff
154
155#define GPIO_FAMILY_CONF(family_name, park_mode, hysctl, vp18_mode, hs_mode, \
156 odt_up_dn, odt_en, curr_src_str, rcomp, family_no, community_offset) { \
157 .confg = ((((park_mode) != NA) ? park_mode << 26 : 0) | \
158 (((hysctl) != NA) ? hysctl << 24 : 0) | \
159 (((vp18_mode) != NA) ? vp18_mode << 21 : 0) | \
160 (((hs_mode) != NA) ? hs_mode << 19 : 0) | \
161 (((odt_up_dn) != NA) ? odt_up_dn << 18 : 0) | \
162 (((odt_en) != NA) ? odt_en << 17 : 0) | \
163 (curr_src_str)), \
164 .confg_changes = ((((park_mode) != NA) ? ONE_BIT << 26 : 0) | \
165 (((hysctl) != NA) ? TWO_BIT << 24 : 0) | \
166 (((vp18_mode) != NA) ? ONE_BIT << 21 : 0) | \
167 (((hs_mode) != NA) ? ONE_BIT << 19 : 0) | \
168 (((odt_up_dn) != NA) ? ONE_BIT << 18 : 0) | \
169 (((odt_en) != NA) ? ONE_BIT << 17 : 0) | \
170 (THREE_BIT)), \
171 .misc = ((rcomp == ENABLE) ? 1 : 0) , \
172 .mmio_addr = (community_offset == TERMINATOR) ? TERMINATOR : \
173 ((family_no != NA) ? (IO_BASE_ADDRESS + community_offset +\
174 (0x80 * family_no) + 0x1080) : 0) , \
175 .name = 0 \
176}
177
178#define GPIO_PAD_CONF(pad_name, mode_select, mode, gpio_config, gpio_state, \
179 gpio_light_mode, int_type, int_sel, term, open_drain, current_source,\
180 int_mask, glitch, inv_rx_tx, wake_mask, wake_mask_bit, gpe, \
181 mmio_offset, community_offset) { \
182 .confg0 = ((((int_sel) != NA) ? (int_sel << 28) : 0) | \
183 (((glitch) != NA) ? (glitch << 26) : 0) | \
184 (((term) != NA) ? (term << 20) : 0) | \
185 (((mode_select) == GPIO) ? ((mode << 16) | (1 << 15)) : \
186 ((mode << 16))) | \
187 (((gpio_config) != NA) ? (gpio_config << 8) : 0) | \
188 (((gpio_light_mode) != NA) ? (gpio_light_mode << 7) : 0) | \
189 (((gpio_state) == HIGH) ? 2 : 0)), \
190 .confg0_changes = ((((int_sel) != NA) ? (FOUR_BIT << 28) : 0) | \
191 (((glitch) != NA) ? (TWO_BIT << 26) : 0) | \
192 (((term) != NA) ? (FOUR_BIT << 20) : 0) | \
193 (FIVE_BIT << 15) | \
194 (((gpio_config) != NA) ? (THREE_BIT << 8) : 0) | \
195 (((gpio_light_mode) != NA) ? (ONE_BIT << 7) : 0) | \
196 (((gpio_state) != NA) ? ONE_BIT << 1 : 0)), \
197 .confg1 = ((((current_source) != NA) ? (current_source << 27) : 0) | \
198 (((inv_rx_tx) != NA) ? inv_rx_tx << 4 : 0) | \
199 (((open_drain) != NA) ? open_drain << 3 : 0) | \
200 (((int_type) != NA) ? int_type : 0)), \
201 .confg1_changes = ((((current_source) != NA) ? (ONE_BIT << 27) : 0) | \
202 (((inv_rx_tx) != NA) ? FOUR_BIT << 4 : 0) | \
203 (((open_drain) != NA) ? ONE_BIT << 3 : 0) | \
204 (((int_type) != NA) ? THREE_BIT : 0)), \
205 .community = community_offset, \
206 .mmio_addr = (community_offset == TERMINATOR) ? TERMINATOR : \
207 ((mmio_offset != NA) ? (IO_BASE_ADDRESS + \
208 community_offset + mmio_offset) : 0), \
209 .name = 0, \
210 .misc = ((((gpe) != NA) ? (gpe << 0) : 0) | \
211 (((wake_mask) != NA) ? (wake_mask << 2) : 0) | \
212 (((int_mask) != NA) ? (int_mask << 3) : 0)) | \
213 (((wake_mask_bit) != NA) ? (wake_mask_bit << 4) : (NA << 4)) \
214}
215
216#endif
217
