uboot/board/freescale/ls2080a/ls2080a.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2014 Freescale Semiconductor
   4 */
   5#include <common.h>
   6#include <init.h>
   7#include <malloc.h>
   8#include <errno.h>
   9#include <net.h>
  10#include <netdev.h>
  11#include <fsl_ifc.h>
  12#include <fsl_ddr.h>
  13#include <asm/io.h>
  14#include <fdt_support.h>
  15#include <linux/libfdt.h>
  16#include <fsl-mc/fsl_mc.h>
  17#include <env_internal.h>
  18#include <asm/arch/soc.h>
  19
  20DECLARE_GLOBAL_DATA_PTR;
  21
  22int board_init(void)
  23{
  24        init_final_memctl_regs();
  25
  26#ifdef CONFIG_ENV_IS_NOWHERE
  27        gd->env_addr = (ulong)&default_environment[0];
  28#endif
  29
  30        return 0;
  31}
  32
  33int board_early_init_f(void)
  34{
  35        fsl_lsch3_early_init_f();
  36        return 0;
  37}
  38
  39void detail_board_ddr_info(void)
  40{
  41        puts("\nDDR    ");
  42        print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, "");
  43        print_ddr_info(0);
  44#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
  45        if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) {
  46                puts("\nDP-DDR ");
  47                print_size(gd->bd->bi_dram[2].size, "");
  48                print_ddr_info(CONFIG_DP_DDR_CTRL);
  49        }
  50#endif
  51}
  52
  53int board_eth_init(struct bd_info *bis)
  54{
  55        int error = 0;
  56
  57#ifdef CONFIG_SMC91111
  58        error = smc91111_initialize(0, CONFIG_SMC91111_BASE);
  59#endif
  60
  61#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
  62        error = cpu_eth_init(bis);
  63#endif
  64        return error;
  65}
  66
  67#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
  68void fdt_fixup_board_enet(void *fdt)
  69{
  70        int offset;
  71
  72        offset = fdt_path_offset(fdt, "/soc/fsl-mc");
  73
  74        /*
  75         * TODO: Remove this when backward compatibility
  76         * with old DT node (/fsl-mc) is no longer needed.
  77         */
  78        if (offset < 0)
  79                offset = fdt_path_offset(fdt, "/fsl-mc");
  80
  81        if (offset < 0) {
  82                printf("%s: ERROR: fsl-mc node not found in device tree (error %d)\n",
  83                       __func__, offset);
  84                return;
  85        }
  86
  87        if (get_mc_boot_status() == 0 &&
  88            (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0))
  89                fdt_status_okay(fdt, offset);
  90        else
  91                fdt_status_fail(fdt, offset);
  92}
  93
  94void board_quiesce_devices(void)
  95{
  96        fsl_mc_ldpaa_exit(gd->bd);
  97}
  98#endif
  99
 100#ifdef CONFIG_OF_BOARD_SETUP
 101int ft_board_setup(void *blob, struct bd_info *bd)
 102{
 103        u64 base[CONFIG_NR_DRAM_BANKS];
 104        u64 size[CONFIG_NR_DRAM_BANKS];
 105
 106        ft_cpu_setup(blob, bd);
 107
 108        /* fixup DT for the two GPP DDR banks */
 109        base[0] = gd->bd->bi_dram[0].start;
 110        size[0] = gd->bd->bi_dram[0].size;
 111        base[1] = gd->bd->bi_dram[1].start;
 112        size[1] = gd->bd->bi_dram[1].size;
 113
 114#ifdef CONFIG_RESV_RAM
 115        /* reduce size if reserved memory is within this bank */
 116        if (gd->arch.resv_ram >= base[0] &&
 117            gd->arch.resv_ram < base[0] + size[0])
 118                size[0] = gd->arch.resv_ram - base[0];
 119        else if (gd->arch.resv_ram >= base[1] &&
 120                 gd->arch.resv_ram < base[1] + size[1])
 121                size[1] = gd->arch.resv_ram - base[1];
 122#endif
 123
 124        fdt_fixup_memory_banks(blob, base, size, 2);
 125
 126        fdt_fsl_mc_fixup_iommu_map_entry(blob);
 127
 128#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 129        fdt_fixup_board_enet(blob);
 130#endif
 131
 132        return 0;
 133}
 134#endif
 135
 136#if defined(CONFIG_RESET_PHY_R)
 137void reset_phy(void)
 138{
 139}
 140#endif
 141
 142#ifdef CONFIG_TFABOOT
 143void *env_sf_get_env_addr(void)
 144{
 145        return (void *)(CONFIG_SYS_FSL_QSPI_BASE1 + CONFIG_ENV_OFFSET);
 146}
 147#endif
 148