LXR uboot/board/toradex/apalis_t30/apalis

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 *  (C) Copyright 2014-2018
   4 *  Marcel Ziswiler <marcel@ziswiler.com>
   5 */
   6
   7#include <common.h>
   8#include <init.h>
   9#include <log.h>
  10#include <asm/arch/gp_padctrl.h>
  11#include <asm/arch/pinmux.h>
  12#include <asm/arch-tegra/ap.h>
  13#include <asm/arch-tegra/tegra.h>
  14#include <asm/gpio.h>
  15#include <asm/io.h>
  16#include <dm.h>
  17#include <i2c.h>
  18#include <pci_tegra.h>
  19#include <linux/delay.h>
  20#include "../common/tdx-common.h"
  21
  22#include "pinmux-config-apalis_t30.h"
  23
  24DECLARE_GLOBAL_DATA_PTR;
  25
  26#define PMU_I2C_ADDRESS         0x2D
  27#define MAX_I2C_RETRY           3
  28
  29#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
  30#define PEX_PERST_N     TEGRA_GPIO(S, 7) /* Apalis GPIO7 */
  31#define RESET_MOCI_CTRL TEGRA_GPIO(I, 4)
  32
  33static int pci_reset_status;
  34#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
  35
  36int arch_misc_init(void)
  37{
  38        if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
  39            NVBOOTTYPE_RECOVERY)
  40                printf("USB recovery mode\n");
  41
  42        return 0;
  43}
  44
  45int checkboard(void)
  46{
  47        printf("Model: Toradex Apalis T30 %dGB\n",
  48               (gd->ram_size == 0x40000000) ? 1 : 2);
  49
  50        return 0;
  51}
  52
  53#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  54int ft_board_setup(void *blob, struct bd_info *bd)
  55{
  56        return ft_common_board_setup(blob, bd);
  57}
  58#endif
  59
  60/*
  61 * Routine: pinmux_init
  62 * Description: Do individual peripheral pinmux configs
  63 */
  64void pinmux_init(void)
  65{
  66        pinmux_config_pingrp_table(tegra3_pinmux_common,
  67                                   ARRAY_SIZE(tegra3_pinmux_common));
  68
  69        pinmux_config_pingrp_table(unused_pins_lowpower,
  70                                   ARRAY_SIZE(unused_pins_lowpower));
  71
  72        /* Initialize any non-default pad configs (APB_MISC_GP regs) */
  73        pinmux_config_drvgrp_table(apalis_t30_padctrl,
  74                                   ARRAY_SIZE(apalis_t30_padctrl));
  75}
  76
  77#ifdef CONFIG_PCI_TEGRA
  78int tegra_pcie_board_init(void)
  79{
  80        struct udevice *dev;
  81        u8 addr, data[1];
  82        int err;
  83
  84        err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
  85        if (err) {
  86                debug("%s: Cannot find PMIC I2C chip\n", __func__);
  87                return err;
  88        }
  89
  90        /* TPS659110: VDD2_OP_REG = 1.05V */
  91        data[0] = 0x27;
  92        addr = 0x25;
  93
  94        err = dm_i2c_write(dev, addr, data, 1);
  95        if (err) {
  96                debug("failed to set VDD supply\n");
  97                return err;
  98        }
  99
 100        /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
 101        data[0] = 0x0D;
 102        addr = 0x24;
 103
 104        err = dm_i2c_write(dev, addr, data, 1);
 105        if (err) {
 106                debug("failed to enable VDD supply\n");
 107                return err;
 108        }
 109
 110        /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
 111        data[0] = 0x0D;
 112        addr = 0x35;
 113
 114        err = dm_i2c_write(dev, addr, data, 1);
 115        if (err) {
 116                debug("failed to set AVDD supply\n");
 117                return err;
 118        }
 119
 120#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
 121        gpio_request(PEX_PERST_N, "PEX_PERST_N");
 122        gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
 123#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
 124
 125        return 0;
 126}
 127
 128void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
 129{
 130        int index = tegra_pcie_port_index_of_port(port);
 131
 132        if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
 133                tegra_pcie_port_reset(port);
 134        }
 135#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
 136        /*
 137         * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
 138         * 0 share the same RESET_MOCI therefore only assert it once for both
 139         * ports to avoid losing the previously brought up port again.
 140         */
 141        else if ((index == 1) || (index == 0)) {
 142                /* only do it once per init cycle */
 143                if (pci_reset_status % 2 == 0) {
 144                        /*
 145                         * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
 146                         * Apalis Evaluation Board
 147                         */
 148                        gpio_direction_output(PEX_PERST_N, 0);
 149                        gpio_direction_output(RESET_MOCI_CTRL, 0);
 150
 151                        /*
 152                         * Must be asserted for 100 ms after power and clocks
 153                         * are stable
 154                         */
 155                        mdelay(100);
 156
 157                        gpio_set_value(PEX_PERST_N, 1);
 158                        /*
 159                         * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
 160                         * Guaranteed Until 900 us After PEX_PERST# De-assertion
 161                         */
 162                        mdelay(1);
 163                        gpio_set_value(RESET_MOCI_CTRL, 1);
 164                }
 165                pci_reset_status++;
 166        }
 167#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
 168}
 169#endif /* CONFIG_PCI_TEGRA */
 170
 171/*
 172 * Backlight off before OS handover
 173 */
 174void board_preboot_os(void)
 175{
 176        gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON");
 177        gpio_direction_output(TEGRA_GPIO(V, 2), 0);
 178}
 179