LXR uboot/board/toradex/verdin-imx8mm/verdin-imx8mm.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2020 Toradex
   4 */
   5
   6#include <common.h>
   7#include <init.h>
   8#include <asm/arch/clock.h>
   9#include <asm/arch/sys_proto.h>
  10#include <asm/io.h>
  11#include <i2c.h>
  12#include <miiphy.h>
  13#include <netdev.h>
  14#include <micrel.h>
  15
  16#include "../common/tdx-cfg-block.h"
  17
  18DECLARE_GLOBAL_DATA_PTR;
  19
  20#define I2C_PMIC        0
  21
  22enum pcb_rev_t {
  23        PCB_VERSION_1_0,
  24        PCB_VERSION_1_1
  25};
  26
  27#if IS_ENABLED(CONFIG_FEC_MXC)
  28static int setup_fec(void)
  29{
  30        struct iomuxc_gpr_base_regs *gpr =
  31                (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
  32
  33        /* Use 125M anatop REF_CLK1 for ENET1, not from external */
  34        clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
  35
  36        return 0;
  37}
  38
  39int board_phy_config(struct phy_device *phydev)
  40{
  41        int tmp;
  42
  43        switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
  44        case PHY_ID_KSZ9031:
  45                /*
  46                 * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by
  47                 * default. The MAC and the layout don't add a skew between
  48                 * clock and data.
  49                 * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for
  50                 * the TXC path to get the required clock skews.
  51                 */
  52                /* control data pad skew - devaddr = 0x02, register = 0x04 */
  53                ksz9031_phy_extended_write(phydev, 0x02,
  54                                           MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
  55                                           MII_KSZ9031_MOD_DATA_NO_POST_INC,
  56                                           0x0070);
  57                /* rx data pad skew - devaddr = 0x02, register = 0x05 */
  58                ksz9031_phy_extended_write(phydev, 0x02,
  59                                           MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
  60                                           MII_KSZ9031_MOD_DATA_NO_POST_INC,
  61                                           0x7777);
  62                /* tx data pad skew - devaddr = 0x02, register = 0x06 */
  63                ksz9031_phy_extended_write(phydev, 0x02,
  64                                           MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
  65                                           MII_KSZ9031_MOD_DATA_NO_POST_INC,
  66                                           0x0000);
  67                /* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
  68                ksz9031_phy_extended_write(phydev, 0x02,
  69                                           MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
  70                                           MII_KSZ9031_MOD_DATA_NO_POST_INC,
  71                                           0x03f4);
  72                break;
  73        case PHY_ID_KSZ9131:
  74        default:
  75                /* read rxc dll control - devaddr = 0x2, register = 0x4c */
  76                tmp = ksz9031_phy_extended_read(phydev, 0x02,
  77                                        MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
  78                                        MII_KSZ9031_MOD_DATA_NO_POST_INC);
  79                /* disable rxdll bypass (enable 2ns skew delay on RXC) */
  80                tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
  81                /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
  82                tmp = ksz9031_phy_extended_write(phydev, 0x02,
  83                                        MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
  84                                        MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
  85                /* read txc dll control - devaddr = 0x02, register = 0x4d */
  86                tmp = ksz9031_phy_extended_read(phydev, 0x02,
  87                                        MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
  88                                        MII_KSZ9031_MOD_DATA_NO_POST_INC);
  89                /* disable txdll bypass (enable 2ns skew delay on TXC) */
  90                tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
  91                /* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
  92                tmp = ksz9031_phy_extended_write(phydev, 0x02,
  93                                        MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
  94                                        MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
  95                break;
  96        }
  97
  98        if (phydev->drv->config)
  99                phydev->drv->config(phydev);
 100        return 0;
 101}
 102#endif
 103
 104int board_init(void)
 105{
 106        if (IS_ENABLED(CONFIG_FEC_MXC))
 107                setup_fec();
 108
 109        return 0;
 110}
 111
 112int board_mmc_get_env_dev(int devno)
 113{
 114        return devno;
 115}
 116
 117static enum pcb_rev_t get_pcb_revision(void)
 118{
 119        struct udevice *bus;
 120        struct udevice *i2c_dev = NULL;
 121        int ret;
 122        u8 is_bd71837 = 0;
 123
 124        ret = uclass_get_device_by_seq(UCLASS_I2C, I2C_PMIC, &bus);
 125        if (!ret)
 126                ret = dm_i2c_probe(bus, 0x4b, 0, &i2c_dev);
 127        if (!ret)
 128                ret = dm_i2c_read(i2c_dev, 0x0, &is_bd71837, 1);
 129
 130        /* BD71837_REV, High Nibble is major version, fix 1010 */
 131        is_bd71837 = !ret && ((is_bd71837 & 0xf0) == 0xa0);
 132        return is_bd71837 ? PCB_VERSION_1_0 : PCB_VERSION_1_1;
 133}
 134
 135static void select_dt_from_module_version(void)
 136{
 137        char variant[32];
 138        char *env_variant = env_get("variant");
 139        int is_wifi = 0;
 140
 141        if (IS_ENABLED(CONFIG_TDX_CFG_BLOCK)) {
 142                /*
 143                 * If we have a valid config block and it says we are a
 144                 * module with Wi-Fi/Bluetooth make sure we use the -wifi
 145                 * device tree.
 146                 */
 147                is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) ||
 148                          (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT);
 149        }
 150
 151        switch (get_pcb_revision()) {
 152        case PCB_VERSION_1_0:
 153                printf("Detected a V1.0 module\n");
 154                if (is_wifi)
 155                        strncpy(&variant[0], "wifi", sizeof(variant));
 156                else
 157                        strncpy(&variant[0], "nonwifi", sizeof(variant));
 158                break;
 159        default:
 160                if (is_wifi)
 161                        strncpy(&variant[0], "wifi-v1.1", sizeof(variant));
 162                else
 163                        strncpy(&variant[0], "nonwifi-v1.1", sizeof(variant));
 164                break;
 165        }
 166
 167        if (strcmp(variant, env_variant)) {
 168                printf("Setting variant to %s\n", variant);
 169                env_set("variant", variant);
 170
 171                if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE))
 172                        env_save();
 173        }
 174}
 175
 176int board_late_init(void)
 177{
 178        select_dt_from_module_version();
 179
 180        return 0;
 181}
 182
 183int board_phys_sdram_size(phys_size_t *size)
 184{
 185        if (!size)
 186                return -EINVAL;
 187
 188        *size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
 189
 190        return 0;
 191}
 192
 193#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 194int ft_board_setup(void *blob, struct bd_info *bd)
 195{
 196        return 0;
 197}
 198#endif
 199