LXR uboot/drivers/net/fm/memac.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2012 Freescale Semiconductor, Inc.
   4 *      Roy Zang <tie-fei.zang@freescale.com>
   5 */
   6
   7/* MAXFRM - maximum frame length */
   8#define MAXFRM_MASK     0x0000ffff
   9
  10#include <common.h>
  11#include <log.h>
  12#include <phy.h>
  13#include <asm/types.h>
  14#include <asm/io.h>
  15#include <fsl_memac.h>
  16
  17#include "fm.h"
  18
  19static void memac_init_mac(struct fsl_enet_mac *mac)
  20{
  21        struct memac *regs = mac->base;
  22
  23        /* mask all interrupt */
  24        out_be32(&regs->imask, IMASK_MASK_ALL);
  25
  26        /* clear all events */
  27        out_be32(&regs->ievent, IEVENT_CLEAR_ALL);
  28
  29        /* set the max receive length */
  30        out_be32(&regs->maxfrm, mac->max_rx_len & MAXFRM_MASK);
  31
  32        /* multicast frame reception for the hash entry disable */
  33        out_be32(&regs->hashtable_ctrl, 0);
  34}
  35
  36static void memac_enable_mac(struct fsl_enet_mac *mac)
  37{
  38        struct memac *regs = mac->base;
  39
  40        setbits_be32(&regs->command_config,
  41                     MEMAC_CMD_CFG_RXTX_EN | MEMAC_CMD_CFG_NO_LEN_CHK);
  42}
  43
  44static void memac_disable_mac(struct fsl_enet_mac *mac)
  45{
  46        struct memac *regs = mac->base;
  47
  48        clrbits_be32(&regs->command_config, MEMAC_CMD_CFG_RXTX_EN);
  49}
  50
  51static void memac_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
  52{
  53        struct memac *regs = mac->base;
  54        u32 mac_addr0, mac_addr1;
  55
  56        /*
  57         * if a station address of 0x12345678ABCD, perform a write to
  58         * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
  59         */
  60        mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
  61                        (mac_addr[1] << 8)  | (mac_addr[0]);
  62        out_be32(&regs->mac_addr_0, mac_addr0);
  63
  64        mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
  65        out_be32(&regs->mac_addr_1, mac_addr1);
  66}
  67
  68static void memac_set_interface_mode(struct fsl_enet_mac *mac,
  69                                        phy_interface_t type, int speed)
  70{
  71        /* Roy need more work here */
  72
  73        struct memac *regs = mac->base;
  74        u32 if_mode, if_status;
  75
  76        /* clear all bits relative with interface mode */
  77        if_mode = in_be32(&regs->if_mode);
  78        if_status = in_be32(&regs->if_status);
  79
  80        /* set interface mode */
  81        switch (type) {
  82        case PHY_INTERFACE_MODE_GMII:
  83                if_mode &= ~IF_MODE_MASK;
  84                if_mode |= IF_MODE_GMII;
  85                break;
  86        case PHY_INTERFACE_MODE_RGMII:
  87        case PHY_INTERFACE_MODE_RGMII_ID:
  88        case PHY_INTERFACE_MODE_RGMII_RXID:
  89        case PHY_INTERFACE_MODE_RGMII_TXID:
  90                if_mode |= (IF_MODE_GMII | IF_MODE_RG);
  91                break;
  92        case PHY_INTERFACE_MODE_RMII:
  93                if_mode |= (IF_MODE_GMII | IF_MODE_RM);
  94                break;
  95        case PHY_INTERFACE_MODE_SGMII:
  96        case PHY_INTERFACE_MODE_SGMII_2500:
  97        case PHY_INTERFACE_MODE_QSGMII:
  98                if_mode &= ~IF_MODE_MASK;
  99                if_mode |= (IF_MODE_GMII);
 100                break;
 101        case PHY_INTERFACE_MODE_XFI:
 102        case PHY_INTERFACE_MODE_XGMII:
 103                if_mode &= ~IF_MODE_MASK;
 104                if_mode |= IF_MODE_XGMII;
 105                break;
 106        default:
 107                break;
 108        }
 109        /* Enable automatic speed selection for Non-XGMII */
 110        if (type != PHY_INTERFACE_MODE_XGMII && type != PHY_INTERFACE_MODE_XFI)
 111                if_mode |= IF_MODE_EN_AUTO;
 112
 113        if (type == PHY_INTERFACE_MODE_RGMII ||
 114            type == PHY_INTERFACE_MODE_RGMII_ID ||
 115            type == PHY_INTERFACE_MODE_RGMII_RXID ||
 116            type == PHY_INTERFACE_MODE_RGMII_TXID) {
 117                if_mode &= ~IF_MODE_EN_AUTO;
 118                if_mode &= ~IF_MODE_SETSP_MASK;
 119                switch (speed) {
 120                case SPEED_1000:
 121                        if_mode |= IF_MODE_SETSP_1000M;
 122                        break;
 123                case SPEED_100:
 124                        if_mode |= IF_MODE_SETSP_100M;
 125                        break;
 126                case SPEED_10:
 127                        if_mode |= IF_MODE_SETSP_10M;
 128                default:
 129                        break;
 130                }
 131        }
 132
 133        debug(" %s, if_mode = %x\n", __func__,  if_mode);
 134        debug(" %s, if_status = %x\n", __func__,  if_status);
 135        out_be32(&regs->if_mode, if_mode);
 136        return;
 137}
 138
 139void init_memac(struct fsl_enet_mac *mac, void *base,
 140                void *phyregs, int max_rx_len)
 141{
 142        debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs);
 143        mac->base = base;
 144        mac->phyregs = phyregs;
 145        mac->max_rx_len = max_rx_len;
 146        mac->init_mac = memac_init_mac;
 147        mac->enable_mac = memac_enable_mac;
 148        mac->disable_mac = memac_disable_mac;
 149        mac->set_mac_addr = memac_set_mac_addr;
 150        mac->set_if_mode = memac_set_interface_mode;
 151}
 152