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10#include <common.h>
11#include <console.h>
12#include <dm.h>
13#include <log.h>
14#include <malloc.h>
15#include <net.h>
16#include <command.h>
17#include <miiphy.h>
18#include <phy.h>
19#include <errno.h>
20#include <linux/bitops.h>
21#include <linux/delay.h>
22#include <linux/err.h>
23#include <linux/compiler.h>
24
25DECLARE_GLOBAL_DATA_PTR;
26
27
28
29
30
31
32
33
34
35
36
37
38static int genphy_config_advert(struct phy_device *phydev)
39{
40 u32 advertise;
41 int oldadv, adv, bmsr;
42 int err, changed = 0;
43
44
45 phydev->advertising &= phydev->supported;
46 advertise = phydev->advertising;
47
48
49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50 oldadv = adv;
51
52 if (adv < 0)
53 return adv;
54
55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56 ADVERTISE_PAUSE_ASYM);
57 if (advertise & ADVERTISED_10baseT_Half)
58 adv |= ADVERTISE_10HALF;
59 if (advertise & ADVERTISED_10baseT_Full)
60 adv |= ADVERTISE_10FULL;
61 if (advertise & ADVERTISED_100baseT_Half)
62 adv |= ADVERTISE_100HALF;
63 if (advertise & ADVERTISED_100baseT_Full)
64 adv |= ADVERTISE_100FULL;
65 if (advertise & ADVERTISED_Pause)
66 adv |= ADVERTISE_PAUSE_CAP;
67 if (advertise & ADVERTISED_Asym_Pause)
68 adv |= ADVERTISE_PAUSE_ASYM;
69 if (advertise & ADVERTISED_1000baseX_Half)
70 adv |= ADVERTISE_1000XHALF;
71 if (advertise & ADVERTISED_1000baseX_Full)
72 adv |= ADVERTISE_1000XFULL;
73
74 if (adv != oldadv) {
75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77 if (err < 0)
78 return err;
79 changed = 1;
80 }
81
82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83 if (bmsr < 0)
84 return bmsr;
85
86
87
88
89
90 if (!(bmsr & BMSR_ESTATEN))
91 return changed;
92
93
94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95 oldadv = adv;
96
97 if (adv < 0)
98 return adv;
99
100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101
102 if (phydev->supported & (SUPPORTED_1000baseT_Half |
103 SUPPORTED_1000baseT_Full)) {
104 if (advertise & SUPPORTED_1000baseT_Half)
105 adv |= ADVERTISE_1000HALF;
106 if (advertise & SUPPORTED_1000baseT_Full)
107 adv |= ADVERTISE_1000FULL;
108 }
109
110 if (adv != oldadv)
111 changed = 1;
112
113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114 if (err < 0)
115 return err;
116
117 return changed;
118}
119
120
121
122
123
124
125
126
127static int genphy_setup_forced(struct phy_device *phydev)
128{
129 int err;
130 int ctl = BMCR_ANRESTART;
131
132 phydev->pause = 0;
133 phydev->asym_pause = 0;
134
135 if (phydev->speed == SPEED_1000)
136 ctl |= BMCR_SPEED1000;
137 else if (phydev->speed == SPEED_100)
138 ctl |= BMCR_SPEED100;
139
140 if (phydev->duplex == DUPLEX_FULL)
141 ctl |= BMCR_FULLDPLX;
142
143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145 return err;
146}
147
148
149
150
151
152int genphy_restart_aneg(struct phy_device *phydev)
153{
154 int ctl;
155
156 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
157
158 if (ctl < 0)
159 return ctl;
160
161 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
162
163
164 ctl &= ~(BMCR_ISOLATE);
165
166 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
167
168 return ctl;
169}
170
171
172
173
174
175
176
177
178
179int genphy_config_aneg(struct phy_device *phydev)
180{
181 int result;
182
183 if (phydev->autoneg != AUTONEG_ENABLE)
184 return genphy_setup_forced(phydev);
185
186 result = genphy_config_advert(phydev);
187
188 if (result < 0)
189 return result;
190
191 if (result == 0) {
192
193
194
195
196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198 if (ctl < 0)
199 return ctl;
200
201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202 result = 1;
203 }
204
205
206
207
208
209 if (result > 0)
210 result = genphy_restart_aneg(phydev);
211
212 return result;
213}
214
215
216
217
218
219
220
221
222
223int genphy_update_link(struct phy_device *phydev)
224{
225 unsigned int mii_reg;
226
227
228
229
230
231 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
232
233
234
235
236
237 if (phydev->link && mii_reg & BMSR_LSTATUS)
238 return 0;
239
240 if ((phydev->autoneg == AUTONEG_ENABLE) &&
241 !(mii_reg & BMSR_ANEGCOMPLETE)) {
242 int i = 0;
243
244 printf("%s Waiting for PHY auto negotiation to complete",
245 phydev->dev->name);
246 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
247
248
249
250 if (i > (PHY_ANEG_TIMEOUT / 50)) {
251 printf(" TIMEOUT !\n");
252 phydev->link = 0;
253 return -ETIMEDOUT;
254 }
255
256 if (ctrlc()) {
257 puts("user interrupt!\n");
258 phydev->link = 0;
259 return -EINTR;
260 }
261
262 if ((i++ % 10) == 0)
263 printf(".");
264
265 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
266 mdelay(50);
267 }
268 printf(" done\n");
269 phydev->link = 1;
270 } else {
271
272 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
273
274 if (mii_reg & BMSR_LSTATUS)
275 phydev->link = 1;
276 else
277 phydev->link = 0;
278 }
279
280 return 0;
281}
282
283
284
285
286
287
288
289
290
291
292int genphy_parse_link(struct phy_device *phydev)
293{
294 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
295
296
297 if (phydev->autoneg == AUTONEG_ENABLE) {
298 u32 lpa = 0;
299 int gblpa = 0;
300 u32 estatus = 0;
301
302
303 if (phydev->supported & (SUPPORTED_1000baseT_Full |
304 SUPPORTED_1000baseT_Half)) {
305
306
307
308 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
309 if (gblpa < 0) {
310 debug("Could not read MII_STAT1000. ");
311 debug("Ignoring gigabit capability\n");
312 gblpa = 0;
313 }
314 gblpa &= phy_read(phydev,
315 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
316 }
317
318
319
320
321 phydev->speed = SPEED_10;
322 phydev->duplex = DUPLEX_HALF;
323
324
325 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
326 phydev->speed = SPEED_1000;
327
328 if (gblpa & PHY_1000BTSR_1000FD)
329 phydev->duplex = DUPLEX_FULL;
330
331
332 return 0;
333 }
334
335 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
336 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
337
338 if (lpa & (LPA_100FULL | LPA_100HALF)) {
339 phydev->speed = SPEED_100;
340
341 if (lpa & LPA_100FULL)
342 phydev->duplex = DUPLEX_FULL;
343
344 } else if (lpa & LPA_10FULL) {
345 phydev->duplex = DUPLEX_FULL;
346 }
347
348
349
350
351
352
353
354
355
356 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
357 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
358 MII_ESTATUS);
359
360 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
361 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
362 phydev->speed = SPEED_1000;
363 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
364 phydev->duplex = DUPLEX_FULL;
365 }
366
367 } else {
368 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
369
370 phydev->speed = SPEED_10;
371 phydev->duplex = DUPLEX_HALF;
372
373 if (bmcr & BMCR_FULLDPLX)
374 phydev->duplex = DUPLEX_FULL;
375
376 if (bmcr & BMCR_SPEED1000)
377 phydev->speed = SPEED_1000;
378 else if (bmcr & BMCR_SPEED100)
379 phydev->speed = SPEED_100;
380 }
381
382 return 0;
383}
384
385int genphy_config(struct phy_device *phydev)
386{
387 int val;
388 u32 features;
389
390 features = (SUPPORTED_TP | SUPPORTED_MII
391 | SUPPORTED_AUI | SUPPORTED_FIBRE |
392 SUPPORTED_BNC);
393
394
395 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
396
397 if (val < 0)
398 return val;
399
400 if (val & BMSR_ANEGCAPABLE)
401 features |= SUPPORTED_Autoneg;
402
403 if (val & BMSR_100FULL)
404 features |= SUPPORTED_100baseT_Full;
405 if (val & BMSR_100HALF)
406 features |= SUPPORTED_100baseT_Half;
407 if (val & BMSR_10FULL)
408 features |= SUPPORTED_10baseT_Full;
409 if (val & BMSR_10HALF)
410 features |= SUPPORTED_10baseT_Half;
411
412 if (val & BMSR_ESTATEN) {
413 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
414
415 if (val < 0)
416 return val;
417
418 if (val & ESTATUS_1000_TFULL)
419 features |= SUPPORTED_1000baseT_Full;
420 if (val & ESTATUS_1000_THALF)
421 features |= SUPPORTED_1000baseT_Half;
422 if (val & ESTATUS_1000_XFULL)
423 features |= SUPPORTED_1000baseX_Full;
424 if (val & ESTATUS_1000_XHALF)
425 features |= SUPPORTED_1000baseX_Half;
426 }
427
428 phydev->supported &= features;
429 phydev->advertising &= features;
430
431 genphy_config_aneg(phydev);
432
433 return 0;
434}
435
436int genphy_startup(struct phy_device *phydev)
437{
438 int ret;
439
440 ret = genphy_update_link(phydev);
441 if (ret)
442 return ret;
443
444 return genphy_parse_link(phydev);
445}
446
447int genphy_shutdown(struct phy_device *phydev)
448{
449 return 0;
450}
451
452static struct phy_driver genphy_driver = {
453 .uid = 0xffffffff,
454 .mask = 0xffffffff,
455 .name = "Generic PHY",
456 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
457 SUPPORTED_AUI | SUPPORTED_FIBRE |
458 SUPPORTED_BNC,
459 .config = genphy_config,
460 .startup = genphy_startup,
461 .shutdown = genphy_shutdown,
462};
463
464int genphy_init(void)
465{
466 return phy_register(&genphy_driver);
467}
468
469static LIST_HEAD(phy_drivers);
470
471int phy_init(void)
472{
473#ifdef CONFIG_NEEDS_MANUAL_RELOC
474
475
476
477
478
479 struct list_head *head = &phy_drivers;
480
481 head->next = (void *)head->next + gd->reloc_off;
482 head->prev = (void *)head->prev + gd->reloc_off;
483#endif
484
485#ifdef CONFIG_B53_SWITCH
486 phy_b53_init();
487#endif
488#ifdef CONFIG_MV88E61XX_SWITCH
489 phy_mv88e61xx_init();
490#endif
491#ifdef CONFIG_PHY_AQUANTIA
492 phy_aquantia_init();
493#endif
494#ifdef CONFIG_PHY_ATHEROS
495 phy_atheros_init();
496#endif
497#ifdef CONFIG_PHY_BROADCOM
498 phy_broadcom_init();
499#endif
500#ifdef CONFIG_PHY_CORTINA
501 phy_cortina_init();
502#endif
503#ifdef CONFIG_PHY_DAVICOM
504 phy_davicom_init();
505#endif
506#ifdef CONFIG_PHY_ET1011C
507 phy_et1011c_init();
508#endif
509#ifdef CONFIG_PHY_LXT
510 phy_lxt_init();
511#endif
512#ifdef CONFIG_PHY_MARVELL
513 phy_marvell_init();
514#endif
515#ifdef CONFIG_PHY_MICREL_KSZ8XXX
516 phy_micrel_ksz8xxx_init();
517#endif
518#ifdef CONFIG_PHY_MICREL_KSZ90X1
519 phy_micrel_ksz90x1_init();
520#endif
521#ifdef CONFIG_PHY_MESON_GXL
522 phy_meson_gxl_init();
523#endif
524#ifdef CONFIG_PHY_NATSEMI
525 phy_natsemi_init();
526#endif
527#ifdef CONFIG_PHY_REALTEK
528 phy_realtek_init();
529#endif
530#ifdef CONFIG_PHY_SMSC
531 phy_smsc_init();
532#endif
533#ifdef CONFIG_PHY_TERANETICS
534 phy_teranetics_init();
535#endif
536#ifdef CONFIG_PHY_TI
537 phy_ti_init();
538#endif
539#ifdef CONFIG_PHY_VITESSE
540 phy_vitesse_init();
541#endif
542#ifdef CONFIG_PHY_XILINX
543 phy_xilinx_init();
544#endif
545#ifdef CONFIG_PHY_MSCC
546 phy_mscc_init();
547#endif
548#ifdef CONFIG_PHY_FIXED
549 phy_fixed_init();
550#endif
551#ifdef CONFIG_PHY_NCSI
552 phy_ncsi_init();
553#endif
554#ifdef CONFIG_PHY_XILINX_GMII2RGMII
555 phy_xilinx_gmii2rgmii_init();
556#endif
557 genphy_init();
558
559 return 0;
560}
561
562int phy_register(struct phy_driver *drv)
563{
564 INIT_LIST_HEAD(&drv->list);
565 list_add_tail(&drv->list, &phy_drivers);
566
567#ifdef CONFIG_NEEDS_MANUAL_RELOC
568 if (drv->probe)
569 drv->probe += gd->reloc_off;
570 if (drv->config)
571 drv->config += gd->reloc_off;
572 if (drv->startup)
573 drv->startup += gd->reloc_off;
574 if (drv->shutdown)
575 drv->shutdown += gd->reloc_off;
576 if (drv->readext)
577 drv->readext += gd->reloc_off;
578 if (drv->writeext)
579 drv->writeext += gd->reloc_off;
580 if (drv->read_mmd)
581 drv->read_mmd += gd->reloc_off;
582 if (drv->write_mmd)
583 drv->write_mmd += gd->reloc_off;
584#endif
585 return 0;
586}
587
588int phy_set_supported(struct phy_device *phydev, u32 max_speed)
589{
590
591
592
593
594 phydev->supported &= PHY_DEFAULT_FEATURES;
595
596 switch (max_speed) {
597 default:
598 return -ENOTSUPP;
599 case SPEED_1000:
600 phydev->supported |= PHY_1000BT_FEATURES;
601
602 case SPEED_100:
603 phydev->supported |= PHY_100BT_FEATURES;
604
605 case SPEED_10:
606 phydev->supported |= PHY_10BT_FEATURES;
607 }
608
609 return 0;
610}
611
612static int phy_probe(struct phy_device *phydev)
613{
614 int err = 0;
615
616 phydev->advertising = phydev->drv->features;
617 phydev->supported = phydev->drv->features;
618
619 phydev->mmds = phydev->drv->mmds;
620
621 if (phydev->drv->probe)
622 err = phydev->drv->probe(phydev);
623
624 return err;
625}
626
627static struct phy_driver *generic_for_interface(phy_interface_t interface)
628{
629#ifdef CONFIG_PHYLIB_10G
630 if (is_10g_interface(interface))
631 return &gen10g_driver;
632#endif
633
634 return &genphy_driver;
635}
636
637static struct phy_driver *get_phy_driver(struct phy_device *phydev,
638 phy_interface_t interface)
639{
640 struct list_head *entry;
641 int phy_id = phydev->phy_id;
642 struct phy_driver *drv = NULL;
643
644 list_for_each(entry, &phy_drivers) {
645 drv = list_entry(entry, struct phy_driver, list);
646 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
647 return drv;
648 }
649
650
651 return generic_for_interface(interface);
652}
653
654static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
655 u32 phy_id, bool is_c45,
656 phy_interface_t interface)
657{
658 struct phy_device *dev;
659
660
661
662
663
664 dev = malloc(sizeof(*dev));
665 if (!dev) {
666 printf("Failed to allocate PHY device for %s:%d\n",
667 bus ? bus->name : "(null bus)", addr);
668 return NULL;
669 }
670
671 memset(dev, 0, sizeof(*dev));
672
673 dev->duplex = -1;
674 dev->link = 0;
675 dev->interface = interface;
676
677#ifdef CONFIG_DM_ETH
678 dev->node = ofnode_null();
679#endif
680
681 dev->autoneg = AUTONEG_ENABLE;
682
683 dev->addr = addr;
684 dev->phy_id = phy_id;
685 dev->is_c45 = is_c45;
686 dev->bus = bus;
687
688 dev->drv = get_phy_driver(dev, interface);
689
690 if (phy_probe(dev)) {
691 printf("%s, PHY probe failed\n", __func__);
692 return NULL;
693 }
694
695 if (addr >= 0 && addr < PHY_MAX_ADDR && phy_id != PHY_FIXED_ID)
696 bus->phymap[addr] = dev;
697
698 return dev;
699}
700
701
702
703
704
705
706
707
708
709
710int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
711{
712 int phy_reg;
713
714
715
716
717
718 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
719
720 if (phy_reg < 0)
721 return -EIO;
722
723 *phy_id = (phy_reg & 0xffff) << 16;
724
725
726 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
727
728 if (phy_reg < 0)
729 return -EIO;
730
731 *phy_id |= (phy_reg & 0xffff);
732
733 return 0;
734}
735
736static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
737 uint phy_mask, int devad,
738 phy_interface_t interface)
739{
740 u32 phy_id = 0xffffffff;
741 bool is_c45;
742
743 while (phy_mask) {
744 int addr = ffs(phy_mask) - 1;
745 int r = get_phy_id(bus, addr, devad, &phy_id);
746
747
748
749
750
751
752
753 if (r == 0 && phy_id == 0)
754 goto next;
755
756
757 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
758 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
759 return phy_device_create(bus, addr, phy_id, is_c45,
760 interface);
761 }
762next:
763 phy_mask &= ~(1 << addr);
764 }
765 return NULL;
766}
767
768static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
769 uint phy_mask,
770 phy_interface_t interface)
771{
772
773 while (phy_mask) {
774 int addr = ffs(phy_mask) - 1;
775
776 if (bus->phymap[addr]) {
777 bus->phymap[addr]->interface = interface;
778 return bus->phymap[addr];
779 }
780 phy_mask &= ~(1 << addr);
781 }
782 return NULL;
783}
784
785static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
786 uint phy_mask,
787 phy_interface_t interface)
788{
789 struct phy_device *phydev;
790 int devad[] = {
791
792 MDIO_DEVAD_NONE,
793
794 MDIO_MMD_PMAPMD,
795 MDIO_MMD_WIS,
796 MDIO_MMD_PCS,
797 MDIO_MMD_PHYXS,
798 MDIO_MMD_VEND1,
799 };
800 int i, devad_cnt;
801
802 devad_cnt = sizeof(devad)/sizeof(int);
803 phydev = search_for_existing_phy(bus, phy_mask, interface);
804 if (phydev)
805 return phydev;
806
807 for (i = 0; i < devad_cnt; i++) {
808 phydev = create_phy_by_mask(bus, phy_mask,
809 devad[i], interface);
810 if (IS_ERR(phydev))
811 return NULL;
812 if (phydev)
813 return phydev;
814 }
815
816 debug("\n%s PHY: ", bus->name);
817 while (phy_mask) {
818 int addr = ffs(phy_mask) - 1;
819
820 debug("%d ", addr);
821 phy_mask &= ~(1 << addr);
822 }
823 debug("not found\n");
824
825 return NULL;
826}
827
828
829
830
831
832
833
834
835
836
837static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
838 phy_interface_t interface)
839{
840 return get_phy_device_by_mask(bus, 1 << addr, interface);
841}
842
843int phy_reset(struct phy_device *phydev)
844{
845 int reg;
846 int timeout = 500;
847 int devad = MDIO_DEVAD_NONE;
848
849 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
850 return 0;
851
852#ifdef CONFIG_PHYLIB_10G
853
854 if (is_10g_interface(phydev->interface)) {
855 if (!phydev->mmds)
856 gen10g_discover_mmds(phydev);
857
858 devad = ffs(phydev->mmds) - 1;
859 }
860#endif
861
862 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
863 debug("PHY reset failed\n");
864 return -1;
865 }
866
867#ifdef CONFIG_PHY_RESET_DELAY
868 udelay(CONFIG_PHY_RESET_DELAY);
869#endif
870
871
872
873
874
875 reg = phy_read(phydev, devad, MII_BMCR);
876 while ((reg & BMCR_RESET) && timeout--) {
877 reg = phy_read(phydev, devad, MII_BMCR);
878
879 if (reg < 0) {
880 debug("PHY status read failed\n");
881 return -1;
882 }
883 udelay(1000);
884 }
885
886 if (reg & BMCR_RESET) {
887 puts("PHY reset timed out\n");
888 return -1;
889 }
890
891 return 0;
892}
893
894int miiphy_reset(const char *devname, unsigned char addr)
895{
896 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
897 struct phy_device *phydev;
898
899
900
901
902
903
904 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
905
906 return phy_reset(phydev);
907}
908
909struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
910 phy_interface_t interface)
911{
912
913 if (bus->reset) {
914 bus->reset(bus);
915
916
917 mdelay(15);
918 }
919
920 return get_phy_device_by_mask(bus, phy_mask, interface);
921}
922
923#ifdef CONFIG_DM_ETH
924void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
925#else
926void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
927#endif
928{
929
930 phy_reset(phydev);
931 if (phydev->dev && phydev->dev != dev) {
932 printf("%s:%d is connected to %s. Reconnecting to %s\n",
933 phydev->bus->name, phydev->addr,
934 phydev->dev->name, dev->name);
935 }
936 phydev->dev = dev;
937 debug("%s connected to %s\n", dev->name, phydev->drv->name);
938}
939
940#ifdef CONFIG_PHY_XILINX_GMII2RGMII
941#ifdef CONFIG_DM_ETH
942static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
943 struct udevice *dev,
944 phy_interface_t interface)
945#else
946static struct phy_device *phy_connect_gmii2rgmii(struct mii_dev *bus,
947 struct eth_device *dev,
948 phy_interface_t interface)
949#endif
950{
951 struct phy_device *phydev = NULL;
952 int sn = dev_of_offset(dev);
953 int off;
954
955 while (sn > 0) {
956 off = fdt_node_offset_by_compatible(gd->fdt_blob, sn,
957 "xlnx,gmii-to-rgmii-1.0");
958 if (off > 0) {
959 phydev = phy_device_create(bus, off,
960 PHY_GMII2RGMII_ID, false,
961 interface);
962 break;
963 }
964 if (off == -FDT_ERR_NOTFOUND)
965 sn = fdt_first_subnode(gd->fdt_blob, sn);
966 else
967 printf("%s: Error finding compat string:%d\n",
968 __func__, off);
969 }
970
971 return phydev;
972}
973#endif
974
975#ifdef CONFIG_PHY_FIXED
976#ifdef CONFIG_DM_ETH
977static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
978 struct udevice *dev,
979 phy_interface_t interface)
980#else
981static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
982 struct eth_device *dev,
983 phy_interface_t interface)
984#endif
985{
986 struct phy_device *phydev = NULL;
987 int sn;
988 const char *name;
989
990 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
991 while (sn > 0) {
992 name = fdt_get_name(gd->fdt_blob, sn, NULL);
993 if (name && strcmp(name, "fixed-link") == 0) {
994 phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
995 interface);
996 break;
997 }
998 sn = fdt_next_subnode(gd->fdt_blob, sn);
999 }
1000
1001 return phydev;
1002}
1003#endif
1004
1005#ifdef CONFIG_DM_ETH
1006struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1007 struct udevice *dev,
1008 phy_interface_t interface)
1009#else
1010struct phy_device *phy_connect(struct mii_dev *bus, int addr,
1011 struct eth_device *dev,
1012 phy_interface_t interface)
1013#endif
1014{
1015 struct phy_device *phydev = NULL;
1016 uint mask = (addr >= 0) ? (1 << addr) : 0xffffffff;
1017
1018#ifdef CONFIG_PHY_FIXED
1019 phydev = phy_connect_fixed(bus, dev, interface);
1020#endif
1021
1022#ifdef CONFIG_PHY_NCSI
1023 if (!phydev)
1024 phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface);
1025#endif
1026
1027#ifdef CONFIG_PHY_XILINX_GMII2RGMII
1028 if (!phydev)
1029 phydev = phy_connect_gmii2rgmii(bus, dev, interface);
1030#endif
1031
1032 if (!phydev)
1033 phydev = phy_find_by_mask(bus, mask, interface);
1034
1035 if (phydev)
1036 phy_connect_dev(phydev, dev);
1037 else
1038 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
1039 return phydev;
1040}
1041
1042
1043
1044
1045int phy_startup(struct phy_device *phydev)
1046{
1047 if (phydev->drv->startup)
1048 return phydev->drv->startup(phydev);
1049
1050 return 0;
1051}
1052
1053__weak int board_phy_config(struct phy_device *phydev)
1054{
1055 if (phydev->drv->config)
1056 return phydev->drv->config(phydev);
1057 return 0;
1058}
1059
1060int phy_config(struct phy_device *phydev)
1061{
1062
1063 return board_phy_config(phydev);
1064}
1065
1066int phy_shutdown(struct phy_device *phydev)
1067{
1068 if (phydev->drv->shutdown)
1069 phydev->drv->shutdown(phydev);
1070
1071 return 0;
1072}
1073
1074int phy_get_interface_by_name(const char *str)
1075{
1076 int i;
1077
1078 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1079 if (!strcmp(str, phy_interface_strings[i]))
1080 return i;
1081 }
1082
1083 return -1;
1084}
1085