uboot/drivers/usb/eth/asix88179.c
<<
>>
Prefs
   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (c) 2014 Rene Griessl <rgriessl@cit-ec.uni-bielefeld.de>
   4 * based on the U-Boot Asix driver as well as information
   5 * from the Linux AX88179_178a driver
   6 */
   7
   8#include <common.h>
   9#include <dm.h>
  10#include <log.h>
  11#include <usb.h>
  12#include <net.h>
  13#include <linux/delay.h>
  14#include <linux/mii.h>
  15#include "usb_ether.h"
  16#include <malloc.h>
  17#include <memalign.h>
  18#include <errno.h>
  19
  20/* ASIX AX88179 based USB 3.0 Ethernet Devices */
  21#define AX88179_PHY_ID                          0x03
  22#define AX_EEPROM_LEN                           0x100
  23#define AX88179_EEPROM_MAGIC                    0x17900b95
  24#define AX_MCAST_FLTSIZE                        8
  25#define AX_MAX_MCAST                            64
  26#define AX_INT_PPLS_LINK                        (1 << 16)
  27#define AX_RXHDR_L4_TYPE_MASK                   0x1c
  28#define AX_RXHDR_L4_TYPE_UDP                    4
  29#define AX_RXHDR_L4_TYPE_TCP                    16
  30#define AX_RXHDR_L3CSUM_ERR                     2
  31#define AX_RXHDR_L4CSUM_ERR                     1
  32#define AX_RXHDR_CRC_ERR                        (1 << 29)
  33#define AX_RXHDR_DROP_ERR                       (1 << 31)
  34#define AX_ENDPOINT_INT                         0x01
  35#define AX_ENDPOINT_IN                          0x02
  36#define AX_ENDPOINT_OUT                         0x03
  37#define AX_ACCESS_MAC                           0x01
  38#define AX_ACCESS_PHY                           0x02
  39#define AX_ACCESS_EEPROM                        0x04
  40#define AX_ACCESS_EFUS                          0x05
  41#define AX_PAUSE_WATERLVL_HIGH                  0x54
  42#define AX_PAUSE_WATERLVL_LOW                   0x55
  43
  44#define PHYSICAL_LINK_STATUS                    0x02
  45        #define AX_USB_SS               (1 << 2)
  46        #define AX_USB_HS               (1 << 1)
  47
  48#define GENERAL_STATUS                          0x03
  49        #define AX_SECLD                (1 << 2)
  50
  51#define AX_SROM_ADDR                            0x07
  52#define AX_SROM_CMD                             0x0a
  53        #define EEP_RD                  (1 << 2)
  54        #define EEP_BUSY                (1 << 4)
  55
  56#define AX_SROM_DATA_LOW                        0x08
  57#define AX_SROM_DATA_HIGH                       0x09
  58
  59#define AX_RX_CTL                               0x0b
  60        #define AX_RX_CTL_DROPCRCERR    (1 << 8)
  61        #define AX_RX_CTL_IPE           (1 << 9)
  62        #define AX_RX_CTL_START         (1 << 7)
  63        #define AX_RX_CTL_AP            (1 << 5)
  64        #define AX_RX_CTL_AM            (1 << 4)
  65        #define AX_RX_CTL_AB            (1 << 3)
  66        #define AX_RX_CTL_AMALL         (1 << 1)
  67        #define AX_RX_CTL_PRO           (1 << 0)
  68        #define AX_RX_CTL_STOP          0
  69
  70#define AX_NODE_ID                              0x10
  71#define AX_MULFLTARY                            0x16
  72
  73#define AX_MEDIUM_STATUS_MODE                   0x22
  74        #define AX_MEDIUM_GIGAMODE      (1 << 0)
  75        #define AX_MEDIUM_FULL_DUPLEX   (1 << 1)
  76        #define AX_MEDIUM_EN_125MHZ     (1 << 3)
  77        #define AX_MEDIUM_RXFLOW_CTRLEN (1 << 4)
  78        #define AX_MEDIUM_TXFLOW_CTRLEN (1 << 5)
  79        #define AX_MEDIUM_RECEIVE_EN    (1 << 8)
  80        #define AX_MEDIUM_PS            (1 << 9)
  81        #define AX_MEDIUM_JUMBO_EN      0x8040
  82
  83#define AX_MONITOR_MOD                          0x24
  84        #define AX_MONITOR_MODE_RWLC    (1 << 1)
  85        #define AX_MONITOR_MODE_RWMP    (1 << 2)
  86        #define AX_MONITOR_MODE_PMEPOL  (1 << 5)
  87        #define AX_MONITOR_MODE_PMETYPE (1 << 6)
  88
  89#define AX_GPIO_CTRL                            0x25
  90        #define AX_GPIO_CTRL_GPIO3EN    (1 << 7)
  91        #define AX_GPIO_CTRL_GPIO2EN    (1 << 6)
  92        #define AX_GPIO_CTRL_GPIO1EN    (1 << 5)
  93
  94#define AX_PHYPWR_RSTCTL                        0x26
  95        #define AX_PHYPWR_RSTCTL_BZ     (1 << 4)
  96        #define AX_PHYPWR_RSTCTL_IPRL   (1 << 5)
  97        #define AX_PHYPWR_RSTCTL_AT     (1 << 12)
  98
  99#define AX_RX_BULKIN_QCTRL                      0x2e
 100#define AX_CLK_SELECT                           0x33
 101        #define AX_CLK_SELECT_BCS       (1 << 0)
 102        #define AX_CLK_SELECT_ACS       (1 << 1)
 103        #define AX_CLK_SELECT_ULR       (1 << 3)
 104
 105#define AX_RXCOE_CTL                            0x34
 106        #define AX_RXCOE_IP             (1 << 0)
 107        #define AX_RXCOE_TCP            (1 << 1)
 108        #define AX_RXCOE_UDP            (1 << 2)
 109        #define AX_RXCOE_TCPV6          (1 << 5)
 110        #define AX_RXCOE_UDPV6          (1 << 6)
 111
 112#define AX_TXCOE_CTL                            0x35
 113        #define AX_TXCOE_IP             (1 << 0)
 114        #define AX_TXCOE_TCP            (1 << 1)
 115        #define AX_TXCOE_UDP            (1 << 2)
 116        #define AX_TXCOE_TCPV6          (1 << 5)
 117        #define AX_TXCOE_UDPV6          (1 << 6)
 118
 119#define AX_LEDCTRL                              0x73
 120
 121#define GMII_PHY_PHYSR                          0x11
 122        #define GMII_PHY_PHYSR_SMASK    0xc000
 123        #define GMII_PHY_PHYSR_GIGA     (1 << 15)
 124        #define GMII_PHY_PHYSR_100      (1 << 14)
 125        #define GMII_PHY_PHYSR_FULL     (1 << 13)
 126        #define GMII_PHY_PHYSR_LINK     (1 << 10)
 127
 128#define GMII_LED_ACT                            0x1a
 129        #define GMII_LED_ACTIVE_MASK    0xff8f
 130        #define GMII_LED0_ACTIVE        (1 << 4)
 131        #define GMII_LED1_ACTIVE        (1 << 5)
 132        #define GMII_LED2_ACTIVE        (1 << 6)
 133
 134#define GMII_LED_LINK                           0x1c
 135        #define GMII_LED_LINK_MASK      0xf888
 136        #define GMII_LED0_LINK_10       (1 << 0)
 137        #define GMII_LED0_LINK_100      (1 << 1)
 138        #define GMII_LED0_LINK_1000     (1 << 2)
 139        #define GMII_LED1_LINK_10       (1 << 4)
 140        #define GMII_LED1_LINK_100      (1 << 5)
 141        #define GMII_LED1_LINK_1000     (1 << 6)
 142        #define GMII_LED2_LINK_10       (1 << 8)
 143        #define GMII_LED2_LINK_100      (1 << 9)
 144        #define GMII_LED2_LINK_1000     (1 << 10)
 145        #define LED0_ACTIVE             (1 << 0)
 146        #define LED0_LINK_10            (1 << 1)
 147        #define LED0_LINK_100           (1 << 2)
 148        #define LED0_LINK_1000          (1 << 3)
 149        #define LED0_FD                 (1 << 4)
 150        #define LED0_USB3_MASK          0x001f
 151        #define LED1_ACTIVE             (1 << 5)
 152        #define LED1_LINK_10            (1 << 6)
 153        #define LED1_LINK_100           (1 << 7)
 154        #define LED1_LINK_1000          (1 << 8)
 155        #define LED1_FD                 (1 << 9)
 156        #define LED1_USB3_MASK          0x03e0
 157        #define LED2_ACTIVE             (1 << 10)
 158        #define LED2_LINK_1000          (1 << 13)
 159        #define LED2_LINK_100           (1 << 12)
 160        #define LED2_LINK_10            (1 << 11)
 161        #define LED2_FD                 (1 << 14)
 162        #define LED_VALID               (1 << 15)
 163        #define LED2_USB3_MASK          0x7c00
 164
 165#define GMII_PHYPAGE                            0x1e
 166#define GMII_PHY_PAGE_SELECT                    0x1f
 167        #define GMII_PHY_PGSEL_EXT      0x0007
 168        #define GMII_PHY_PGSEL_PAGE0    0x0000
 169
 170/* local defines */
 171#define ASIX_BASE_NAME "axg"
 172#define USB_CTRL_SET_TIMEOUT 5000
 173#define USB_CTRL_GET_TIMEOUT 5000
 174#define USB_BULK_SEND_TIMEOUT 5000
 175#define USB_BULK_RECV_TIMEOUT 5000
 176
 177#define AX_RX_URB_SIZE 1024 * 0x12
 178#define BLK_FRAME_SIZE 0x200
 179#define PHY_CONNECT_TIMEOUT 5000
 180
 181#define TIMEOUT_RESOLUTION 50   /* ms */
 182
 183#define FLAG_NONE                       0
 184#define FLAG_TYPE_AX88179       (1U << 0)
 185#define FLAG_TYPE_AX88178a      (1U << 1)
 186#define FLAG_TYPE_DLINK_DUB1312 (1U << 2)
 187#define FLAG_TYPE_SITECOM       (1U << 3)
 188#define FLAG_TYPE_SAMSUNG       (1U << 4)
 189#define FLAG_TYPE_LENOVO        (1U << 5)
 190#define FLAG_TYPE_GX3           (1U << 6)
 191
 192/* local vars */
 193static const struct {
 194        unsigned char ctrl, timer_l, timer_h, size, ifg;
 195} AX88179_BULKIN_SIZE[] =       {
 196        {7, 0x4f, 0,    0x02, 0xff},
 197        {7, 0x20, 3,    0x03, 0xff},
 198        {7, 0xae, 7,    0x04, 0xff},
 199        {7, 0xcc, 0x4c, 0x04, 8},
 200};
 201
 202#ifndef CONFIG_DM_ETH
 203static int curr_eth_dev; /* index for name of next device detected */
 204#endif
 205
 206/* driver private */
 207struct asix_private {
 208#ifdef CONFIG_DM_ETH
 209        struct ueth_data ueth;
 210        unsigned pkt_cnt;
 211        uint8_t *pkt_data;
 212        uint32_t *pkt_hdr;
 213#endif
 214        int flags;
 215        int rx_urb_size;
 216        int maxpacketsize;
 217};
 218
 219/*
 220 * Asix infrastructure commands
 221 */
 222static int asix_write_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
 223                             u16 size, void *data)
 224{
 225        int len;
 226        ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
 227
 228        debug("asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 229              cmd, value, index, size);
 230
 231        memcpy(buf, data, size);
 232
 233        len = usb_control_msg(
 234                dev->pusb_dev,
 235                usb_sndctrlpipe(dev->pusb_dev, 0),
 236                cmd,
 237                USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 238                value,
 239                index,
 240                buf,
 241                size,
 242                USB_CTRL_SET_TIMEOUT);
 243
 244        return len == size ? 0 : ECOMM;
 245}
 246
 247static int asix_read_cmd(struct ueth_data *dev, u8 cmd, u16 value, u16 index,
 248                            u16 size, void *data)
 249{
 250        int len;
 251        ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, size);
 252
 253        debug("asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 254              cmd, value, index, size);
 255
 256        len = usb_control_msg(
 257                dev->pusb_dev,
 258                usb_rcvctrlpipe(dev->pusb_dev, 0),
 259                cmd,
 260                USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 261                value,
 262                index,
 263                buf,
 264                size,
 265                USB_CTRL_GET_TIMEOUT);
 266
 267        memcpy(data, buf, size);
 268
 269        return len == size ? 0 : ECOMM;
 270}
 271
 272static int asix_read_mac(struct ueth_data *dev, uint8_t *enetaddr)
 273{
 274        int ret;
 275
 276        ret = asix_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, 6, 6, enetaddr);
 277        if (ret < 0)
 278                debug("Failed to read MAC address: %02x\n", ret);
 279
 280        return ret;
 281}
 282
 283static int asix_write_mac(struct ueth_data *dev, uint8_t *enetaddr)
 284{
 285        int ret;
 286
 287        ret = asix_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
 288                                 ETH_ALEN, enetaddr);
 289        if (ret < 0)
 290                debug("Failed to set MAC address: %02x\n", ret);
 291
 292        return ret;
 293}
 294
 295static int asix_basic_reset(struct ueth_data *dev,
 296                        struct asix_private *dev_priv)
 297{
 298        u8 buf[5];
 299        u16 *tmp16;
 300        u8 *tmp;
 301
 302        tmp16 = (u16 *)buf;
 303        tmp = (u8 *)buf;
 304
 305        /* Power up ethernet PHY */
 306        *tmp16 = 0;
 307        asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
 308
 309        *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
 310        asix_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
 311        mdelay(200);
 312
 313        *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
 314        asix_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
 315        mdelay(200);
 316
 317        /* RX bulk configuration */
 318        memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
 319        asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
 320
 321        dev_priv->rx_urb_size = 128 * 20;
 322
 323        /* Water Level configuration */
 324        *tmp = 0x34;
 325        asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
 326
 327        *tmp = 0x52;
 328        asix_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH, 1, 1, tmp);
 329
 330        /* Enable checksum offload */
 331        *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
 332               AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
 333        asix_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
 334
 335        *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
 336               AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
 337        asix_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
 338
 339        /* Configure RX control register => start operation */
 340        *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
 341                 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
 342        asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
 343
 344        *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
 345               AX_MONITOR_MODE_RWMP;
 346        asix_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
 347
 348        /* Configure default medium type => giga */
 349        *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
 350                 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
 351                 AX_MEDIUM_GIGAMODE | AX_MEDIUM_JUMBO_EN;
 352        asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE, 2, 2, tmp16);
 353
 354        u16 adv = 0;
 355        adv = ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_LPACK |
 356              ADVERTISE_NPAGE | ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP;
 357        asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_ADVERTISE, 2, &adv);
 358
 359        adv = ADVERTISE_1000FULL;
 360        asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
 361
 362        return 0;
 363}
 364
 365static int asix_wait_link(struct ueth_data *dev)
 366{
 367        int timeout = 0;
 368        int link_detected;
 369        u8 buf[2];
 370        u16 *tmp16;
 371
 372        tmp16 = (u16 *)buf;
 373
 374        do {
 375                asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 376                              MII_BMSR, 2, buf);
 377                link_detected = *tmp16 & BMSR_LSTATUS;
 378                if (!link_detected) {
 379                        if (timeout == 0)
 380                                printf("Waiting for Ethernet connection... ");
 381                        mdelay(TIMEOUT_RESOLUTION);
 382                        timeout += TIMEOUT_RESOLUTION;
 383                }
 384        } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
 385
 386        if (link_detected) {
 387                if (timeout > 0)
 388                        printf("done.\n");
 389                return 0;
 390        } else {
 391                printf("unable to connect.\n");
 392                return -ENETUNREACH;
 393        }
 394}
 395
 396static int asix_init_common(struct ueth_data *dev,
 397                        struct asix_private *dev_priv)
 398{
 399        u8 buf[2], tmp[5], link_sts;
 400        u16 *tmp16, mode;
 401
 402
 403        tmp16 = (u16 *)buf;
 404
 405        debug("** %s()\n", __func__);
 406
 407        /* Configure RX control register => start operation */
 408        *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
 409                 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
 410        if (asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16) != 0)
 411                goto out_err;
 412
 413        if (asix_wait_link(dev) != 0) {
 414                /*reset device and try again*/
 415                printf("Reset Ethernet Device\n");
 416                asix_basic_reset(dev, dev_priv);
 417                if (asix_wait_link(dev) != 0)
 418                        goto out_err;
 419        }
 420
 421        /* Configure link */
 422        mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
 423               AX_MEDIUM_RXFLOW_CTRLEN;
 424
 425        asix_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
 426                      1, 1, &link_sts);
 427
 428        asix_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
 429                      GMII_PHY_PHYSR, 2, tmp16);
 430
 431        if (!(*tmp16 & GMII_PHY_PHYSR_LINK)) {
 432                return 0;
 433        } else if (GMII_PHY_PHYSR_GIGA == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
 434                mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ |
 435                        AX_MEDIUM_JUMBO_EN;
 436
 437                if (link_sts & AX_USB_SS)
 438                        memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
 439                else if (link_sts & AX_USB_HS)
 440                        memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
 441                else
 442                        memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
 443        } else if (GMII_PHY_PHYSR_100 == (*tmp16 & GMII_PHY_PHYSR_SMASK)) {
 444                mode |= AX_MEDIUM_PS;
 445
 446                if (link_sts & (AX_USB_SS | AX_USB_HS))
 447                        memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
 448                else
 449                        memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
 450        } else {
 451                memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
 452        }
 453
 454        /* RX bulk configuration */
 455        asix_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
 456
 457        dev_priv->rx_urb_size = (1024 * (tmp[3] + 2));
 458        if (*tmp16 & GMII_PHY_PHYSR_FULL)
 459                mode |= AX_MEDIUM_FULL_DUPLEX;
 460        asix_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
 461                       2, 2, &mode);
 462
 463        return 0;
 464out_err:
 465        return -1;
 466}
 467
 468static int asix_send_common(struct ueth_data *dev,
 469                        struct asix_private *dev_priv,
 470                        void *packet, int length)
 471{
 472        int err;
 473        u32 packet_len, tx_hdr2;
 474        int actual_len, framesize;
 475        ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
 476                                 PKTSIZE + (2 * sizeof(packet_len)));
 477
 478        debug("** %s(), len %d\n", __func__, length);
 479
 480        packet_len = length;
 481        cpu_to_le32s(&packet_len);
 482
 483        memcpy(msg, &packet_len, sizeof(packet_len));
 484        framesize = dev_priv->maxpacketsize;
 485        tx_hdr2 = 0;
 486        if (((length + 8) % framesize) == 0)
 487                tx_hdr2 |= 0x80008000;  /* Enable padding */
 488
 489        cpu_to_le32s(&tx_hdr2);
 490
 491        memcpy(msg + sizeof(packet_len), &tx_hdr2, sizeof(tx_hdr2));
 492
 493        memcpy(msg + sizeof(packet_len) + sizeof(tx_hdr2),
 494               (void *)packet, length);
 495
 496        err = usb_bulk_msg(dev->pusb_dev,
 497                                usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
 498                                (void *)msg,
 499                                length + sizeof(packet_len) + sizeof(tx_hdr2),
 500                                &actual_len,
 501                                USB_BULK_SEND_TIMEOUT);
 502        debug("Tx: len = %zu, actual = %u, err = %d\n",
 503              length + sizeof(packet_len), actual_len, err);
 504
 505        return err;
 506}
 507
 508#ifndef CONFIG_DM_ETH
 509/*
 510 * Asix callbacks
 511 */
 512static int asix_init(struct eth_device *eth, struct bd_info *bd)
 513{
 514        struct ueth_data *dev = (struct ueth_data *)eth->priv;
 515        struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
 516
 517        return asix_init_common(dev, dev_priv);
 518}
 519
 520static int asix_write_hwaddr(struct eth_device *eth)
 521{
 522        struct ueth_data *dev = (struct ueth_data *)eth->priv;
 523
 524        return asix_write_mac(dev, eth->enetaddr);
 525}
 526
 527static int asix_send(struct eth_device *eth, void *packet, int length)
 528{
 529        struct ueth_data *dev = (struct ueth_data *)eth->priv;
 530        struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
 531
 532        return asix_send_common(dev, dev_priv, packet, length);
 533}
 534
 535static int asix_recv(struct eth_device *eth)
 536{
 537        struct ueth_data *dev = (struct ueth_data *)eth->priv;
 538        struct asix_private *dev_priv = (struct asix_private *)dev->dev_priv;
 539
 540        u16 frame_pos;
 541        int err;
 542        int actual_len;
 543
 544        int pkt_cnt;
 545        u32 rx_hdr;
 546        u16 hdr_off;
 547        u32 *pkt_hdr;
 548        ALLOC_CACHE_ALIGN_BUFFER(u8, recv_buf, dev_priv->rx_urb_size);
 549
 550        actual_len = -1;
 551
 552        debug("** %s()\n", __func__);
 553
 554        err = usb_bulk_msg(dev->pusb_dev,
 555                                usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
 556                                (void *)recv_buf,
 557                                dev_priv->rx_urb_size,
 558                                &actual_len,
 559                                USB_BULK_RECV_TIMEOUT);
 560        debug("Rx: len = %u, actual = %u, err = %d\n", dev_priv->rx_urb_size,
 561              actual_len, err);
 562
 563        if (err != 0) {
 564                debug("Rx: failed to receive\n");
 565                return -ECOMM;
 566        }
 567        if (actual_len > dev_priv->rx_urb_size) {
 568                debug("Rx: received too many bytes %d\n", actual_len);
 569                return -EMSGSIZE;
 570        }
 571
 572
 573        rx_hdr = *(u32 *)(recv_buf + actual_len - 4);
 574        le32_to_cpus(&rx_hdr);
 575
 576        pkt_cnt = (u16)rx_hdr;
 577        hdr_off = (u16)(rx_hdr >> 16);
 578        pkt_hdr = (u32 *)(recv_buf + hdr_off);
 579
 580
 581        frame_pos = 0;
 582
 583        while (pkt_cnt--) {
 584                u16 pkt_len;
 585
 586                le32_to_cpus(pkt_hdr);
 587                pkt_len = (*pkt_hdr >> 16) & 0x1fff;
 588
 589                frame_pos += 2;
 590
 591                net_process_received_packet(recv_buf + frame_pos, pkt_len);
 592
 593                pkt_hdr++;
 594                frame_pos += ((pkt_len + 7) & 0xFFF8)-2;
 595
 596                if (pkt_cnt == 0)
 597                        return 0;
 598        }
 599        return err;
 600}
 601
 602static void asix_halt(struct eth_device *eth)
 603{
 604        debug("** %s()\n", __func__);
 605}
 606
 607/*
 608 * Asix probing functions
 609 */
 610void ax88179_eth_before_probe(void)
 611{
 612        curr_eth_dev = 0;
 613}
 614
 615struct asix_dongle {
 616        unsigned short vendor;
 617        unsigned short product;
 618        int flags;
 619};
 620
 621static const struct asix_dongle asix_dongles[] = {
 622        { 0x0b95, 0x1790, FLAG_TYPE_AX88179 },
 623        { 0x0b95, 0x178a, FLAG_TYPE_AX88178a },
 624        { 0x2001, 0x4a00, FLAG_TYPE_DLINK_DUB1312 },
 625        { 0x0df6, 0x0072, FLAG_TYPE_SITECOM },
 626        { 0x04e8, 0xa100, FLAG_TYPE_SAMSUNG },
 627        { 0x17ef, 0x304b, FLAG_TYPE_LENOVO },
 628        { 0x04b4, 0x3610, FLAG_TYPE_GX3 },
 629        { 0x0000, 0x0000, FLAG_NONE }   /* END - Do not remove */
 630};
 631
 632/* Probe to see if a new device is actually an asix device */
 633int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum,
 634                      struct ueth_data *ss)
 635{
 636        struct usb_interface *iface;
 637        struct usb_interface_descriptor *iface_desc;
 638        struct asix_private *dev_priv;
 639        int ep_in_found = 0, ep_out_found = 0;
 640        int i;
 641
 642        /* let's examine the device now */
 643        iface = &dev->config.if_desc[ifnum];
 644        iface_desc = &dev->config.if_desc[ifnum].desc;
 645
 646        for (i = 0; asix_dongles[i].vendor != 0; i++) {
 647                if (dev->descriptor.idVendor == asix_dongles[i].vendor &&
 648                    dev->descriptor.idProduct == asix_dongles[i].product)
 649                        /* Found a supported dongle */
 650                        break;
 651        }
 652
 653        if (asix_dongles[i].vendor == 0)
 654                return 0;
 655
 656        memset(ss, 0, sizeof(struct ueth_data));
 657
 658        /* At this point, we know we've got a live one */
 659        debug("\n\nUSB Ethernet device detected: %#04x:%#04x\n",
 660              dev->descriptor.idVendor, dev->descriptor.idProduct);
 661
 662        /* Initialize the ueth_data structure with some useful info */
 663        ss->ifnum = ifnum;
 664        ss->pusb_dev = dev;
 665        ss->subclass = iface_desc->bInterfaceSubClass;
 666        ss->protocol = iface_desc->bInterfaceProtocol;
 667
 668        /* alloc driver private */
 669        ss->dev_priv = calloc(1, sizeof(struct asix_private));
 670        if (!ss->dev_priv)
 671                return 0;
 672        dev_priv = ss->dev_priv;
 673        dev_priv->flags = asix_dongles[i].flags;
 674
 675        /*
 676         * We are expecting a minimum of 3 endpoints - in, out (bulk), and
 677         * int. We will ignore any others.
 678         */
 679        for (i = 0; i < iface_desc->bNumEndpoints; i++) {
 680                /* is it an interrupt endpoint? */
 681                if ((iface->ep_desc[i].bmAttributes &
 682                    USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
 683                        ss->ep_int = iface->ep_desc[i].bEndpointAddress &
 684                                USB_ENDPOINT_NUMBER_MASK;
 685                        ss->irqinterval = iface->ep_desc[i].bInterval;
 686                        continue;
 687                }
 688
 689                /* is it an BULK endpoint? */
 690                if (!((iface->ep_desc[i].bmAttributes &
 691                     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK))
 692                        continue;
 693
 694                u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
 695                if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
 696                        ss->ep_in = ep_addr &
 697                                USB_ENDPOINT_NUMBER_MASK;
 698                        ep_in_found = 1;
 699                }
 700                if (!(ep_addr & USB_DIR_IN) && !ep_out_found) {
 701                        ss->ep_out = ep_addr &
 702                                USB_ENDPOINT_NUMBER_MASK;
 703                        dev_priv->maxpacketsize =
 704                                dev->epmaxpacketout[AX_ENDPOINT_OUT];
 705                        ep_out_found = 1;
 706                }
 707        }
 708        debug("Endpoints In %d Out %d Int %d\n",
 709              ss->ep_in, ss->ep_out, ss->ep_int);
 710
 711        /* Do some basic sanity checks, and bail if we find a problem */
 712        if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
 713            !ss->ep_in || !ss->ep_out || !ss->ep_int) {
 714                debug("Problems with device\n");
 715                return 0;
 716        }
 717        dev->privptr = (void *)ss;
 718        return 1;
 719}
 720
 721int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
 722                                struct eth_device *eth)
 723{
 724        struct asix_private *dev_priv = (struct asix_private *)ss->dev_priv;
 725
 726        if (!eth) {
 727                debug("%s: missing parameter.\n", __func__);
 728                return 0;
 729        }
 730        sprintf(eth->name, "%s%d", ASIX_BASE_NAME, curr_eth_dev++);
 731        eth->init = asix_init;
 732        eth->send = asix_send;
 733        eth->recv = asix_recv;
 734        eth->halt = asix_halt;
 735        eth->write_hwaddr = asix_write_hwaddr;
 736        eth->priv = ss;
 737
 738        if (asix_basic_reset(ss, dev_priv))
 739                return 0;
 740
 741        /* Get the MAC address */
 742        if (asix_read_mac(ss, eth->enetaddr))
 743                return 0;
 744        debug("MAC %pM\n", eth->enetaddr);
 745
 746        return 1;
 747}
 748
 749#else /* !CONFIG_DM_ETH */
 750
 751static int ax88179_eth_start(struct udevice *dev)
 752{
 753        struct asix_private *priv = dev_get_priv(dev);
 754
 755        return asix_init_common(&priv->ueth, priv);
 756}
 757
 758void ax88179_eth_stop(struct udevice *dev)
 759{
 760        struct asix_private *priv = dev_get_priv(dev);
 761        struct ueth_data *ueth = &priv->ueth;
 762
 763        debug("** %s()\n", __func__);
 764
 765        usb_ether_advance_rxbuf(ueth, -1);
 766        priv->pkt_cnt = 0;
 767        priv->pkt_data = NULL;
 768        priv->pkt_hdr = NULL;
 769}
 770
 771int ax88179_eth_send(struct udevice *dev, void *packet, int length)
 772{
 773        struct asix_private *priv = dev_get_priv(dev);
 774
 775        return asix_send_common(&priv->ueth, priv, packet, length);
 776}
 777
 778int ax88179_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 779{
 780        struct asix_private *priv = dev_get_priv(dev);
 781        struct ueth_data *ueth = &priv->ueth;
 782        int ret, len;
 783        u16 pkt_len;
 784
 785        /* No packet left, get a new one */
 786        if (priv->pkt_cnt == 0) {
 787                uint8_t *ptr;
 788                u16 pkt_cnt;
 789                u16 hdr_off;
 790                u32 rx_hdr;
 791
 792                len = usb_ether_get_rx_bytes(ueth, &ptr);
 793                debug("%s: first try, len=%d\n", __func__, len);
 794                if (!len) {
 795                        if (!(flags & ETH_RECV_CHECK_DEVICE))
 796                                return -EAGAIN;
 797
 798                        ret = usb_ether_receive(ueth, priv->rx_urb_size);
 799                        if (ret < 0)
 800                                return ret;
 801
 802                        len = usb_ether_get_rx_bytes(ueth, &ptr);
 803                        debug("%s: second try, len=%d\n", __func__, len);
 804                }
 805
 806                if (len < 4) {
 807                        usb_ether_advance_rxbuf(ueth, -1);
 808                        return -EMSGSIZE;
 809                }
 810
 811                rx_hdr = *(u32 *)(ptr + len - 4);
 812                le32_to_cpus(&rx_hdr);
 813
 814                pkt_cnt = (u16)rx_hdr;
 815                if (pkt_cnt == 0) {
 816                        usb_ether_advance_rxbuf(ueth, -1);
 817                        return 0;
 818                }
 819
 820                hdr_off = (u16)(rx_hdr >> 16);
 821                if (hdr_off > len - 4) {
 822                        usb_ether_advance_rxbuf(ueth, -1);
 823                        return -EIO;
 824                }
 825
 826                priv->pkt_cnt = pkt_cnt;
 827                priv->pkt_data = ptr;
 828                priv->pkt_hdr = (u32 *)(ptr + hdr_off);
 829                debug("%s: %d packets received, pkt header at %d\n",
 830                      __func__, (int)priv->pkt_cnt, (int)hdr_off);
 831        }
 832
 833        le32_to_cpus(priv->pkt_hdr);
 834        pkt_len = (*priv->pkt_hdr >> 16) & 0x1fff;
 835
 836        *packetp = priv->pkt_data + 2;
 837
 838        priv->pkt_data += (pkt_len + 7) & 0xFFF8;
 839        priv->pkt_cnt--;
 840        priv->pkt_hdr++;
 841
 842        debug("%s: return packet of %d bytes (%d packets left)\n",
 843              __func__, (int)pkt_len, priv->pkt_cnt);
 844        return pkt_len;
 845}
 846
 847static int ax88179_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
 848{
 849        struct asix_private *priv = dev_get_priv(dev);
 850        struct ueth_data *ueth = &priv->ueth;
 851
 852        if (priv->pkt_cnt == 0)
 853                usb_ether_advance_rxbuf(ueth, -1);
 854
 855        return 0;
 856}
 857
 858int ax88179_write_hwaddr(struct udevice *dev)
 859{
 860        struct eth_pdata *pdata = dev_get_platdata(dev);
 861        struct asix_private *priv = dev_get_priv(dev);
 862        struct ueth_data *ueth = &priv->ueth;
 863
 864        return asix_write_mac(ueth, pdata->enetaddr);
 865}
 866
 867static int ax88179_eth_probe(struct udevice *dev)
 868{
 869        struct eth_pdata *pdata = dev_get_platdata(dev);
 870        struct asix_private *priv = dev_get_priv(dev);
 871        struct usb_device *usb_dev;
 872        int ret;
 873
 874        priv->flags = dev->driver_data;
 875        ret = usb_ether_register(dev, &priv->ueth, AX_RX_URB_SIZE);
 876        if (ret)
 877                return ret;
 878
 879        usb_dev = priv->ueth.pusb_dev;
 880        priv->maxpacketsize = usb_dev->epmaxpacketout[AX_ENDPOINT_OUT];
 881
 882        /* Get the MAC address */
 883        ret = asix_read_mac(&priv->ueth, pdata->enetaddr);
 884        if (ret)
 885                return ret;
 886        debug("MAC %pM\n", pdata->enetaddr);
 887
 888        return 0;
 889}
 890
 891static const struct eth_ops ax88179_eth_ops = {
 892        .start = ax88179_eth_start,
 893        .send = ax88179_eth_send,
 894        .recv = ax88179_eth_recv,
 895        .free_pkt = ax88179_free_pkt,
 896        .stop = ax88179_eth_stop,
 897        .write_hwaddr = ax88179_write_hwaddr,
 898};
 899
 900U_BOOT_DRIVER(ax88179_eth) = {
 901        .name = "ax88179_eth",
 902        .id = UCLASS_ETH,
 903        .probe = ax88179_eth_probe,
 904        .ops = &ax88179_eth_ops,
 905        .priv_auto_alloc_size = sizeof(struct asix_private),
 906        .platdata_auto_alloc_size = sizeof(struct eth_pdata),
 907};
 908
 909static const struct usb_device_id ax88179_eth_id_table[] = {
 910        { USB_DEVICE(0x0b95, 0x1790), .driver_info = FLAG_TYPE_AX88179 },
 911        { USB_DEVICE(0x0b95, 0x178a), .driver_info = FLAG_TYPE_AX88178a },
 912        { USB_DEVICE(0x2001, 0x4a00), .driver_info = FLAG_TYPE_DLINK_DUB1312 },
 913        { USB_DEVICE(0x0df6, 0x0072), .driver_info = FLAG_TYPE_SITECOM },
 914        { USB_DEVICE(0x04e8, 0xa100), .driver_info = FLAG_TYPE_SAMSUNG },
 915        { USB_DEVICE(0x17ef, 0x304b), .driver_info = FLAG_TYPE_LENOVO },
 916        { USB_DEVICE(0x04b4, 0x3610), .driver_info = FLAG_TYPE_GX3 },
 917        { }             /* Terminating entry */
 918};
 919
 920U_BOOT_USB_DEVICE(ax88179_eth, ax88179_eth_id_table);
 921#endif /* !CONFIG_DM_ETH */
 922