1
2
3
4
5
6
7
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_SYS_SRIO
13#define CONFIG_SRIO1
14
15#define CONFIG_PCI1 1
16#define CONFIG_PCIE1 1
17#define CONFIG_FSL_PCI_INIT 1
18#define CONFIG_PCI_INDIRECT_BRIDGE 1
19#define CONFIG_SYS_PCI_64BIT 1
20
21#ifndef __ASSEMBLY__
22extern unsigned long get_clock_freq(void);
23#endif
24#define CONFIG_SYS_CLK_FREQ 66000000
25
26
27
28
29#define CONFIG_L2_CACHE
30#define CONFIG_BTB
31
32
33
34
35#define CONFIG_ENABLE_36BIT_PHYS 1
36
37#define CONFIG_SYS_CCSRBAR 0xe0000000
38#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
39
40
41#define CONFIG_SPD_EEPROM
42#define CONFIG_DDR_SPD
43#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
44
45#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
46
47#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
48#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
49
50#define CONFIG_DIMM_SLOTS_PER_CTLR 1
51#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
52
53
54#define SPD_EEPROM_ADDRESS 0x51
55
56
57#ifndef CONFIG_SPD_EEPROM
58#error ("CONFIG_SPD_EEPROM is required")
59#endif
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94#define CONFIG_SYS_BCSR_BASE 0xf8000000
95
96#define CONFIG_SYS_FLASH_BASE 0xfe000000
97
98
99#define CONFIG_SYS_BR0_PRELIM 0xfe001001
100#define CONFIG_SYS_OR0_PRELIM 0xfe006ff7
101
102
103#define CONFIG_SYS_BR1_PRELIM 0xf8000801
104#define CONFIG_SYS_OR1_PRELIM 0xffffe9f7
105
106
107#define CONFIG_SYS_MAX_FLASH_BANKS 1
108#define CONFIG_SYS_MAX_FLASH_SECT 512
109#undef CONFIG_SYS_FLASH_CHECKSUM
110#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
111#define CONFIG_SYS_FLASH_WRITE_TOUT 500
112
113#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
114
115#define CONFIG_SYS_FLASH_EMPTY_INFO
116
117
118
119
120#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000
121#define CONFIG_SYS_LBC_SDRAM_SIZE 64
122
123
124#define CONFIG_SYS_BR2_PRELIM 0xf0001861
125#define CONFIG_SYS_OR2_PRELIM 0xfc006901
126
127#define CONFIG_SYS_LBC_LCRR 0x00030004
128#define CONFIG_SYS_LBC_LBCR 0x00000000
129#define CONFIG_SYS_LBC_LSRT 0x20000000
130#define CONFIG_SYS_LBC_MRTPR 0x00000000
131
132
133
134
135
136
137
138#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \
139 | LSDMR_PRETOACT7 \
140 | LSDMR_ACTTORW7 \
141 | LSDMR_BL8 \
142 | LSDMR_WRC4 \
143 | LSDMR_CL3 \
144 | LSDMR_RFEN \
145 )
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176#define CONFIG_SYS_BCSR (0xf8000000)
177
178
179#define CONFIG_SYS_BR4_PRELIM 0xf8008801
180#define CONFIG_SYS_OR4_PRELIM 0xffffe9f7
181
182
183#define CONFIG_SYS_BR5_PRELIM 0xf8010801
184#define CONFIG_SYS_OR5_PRELIM 0xffff69f7
185
186#define CONFIG_SYS_INIT_RAM_LOCK 1
187#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000
188#define CONFIG_SYS_INIT_RAM_SIZE 0x4000
189
190#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
191#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
192
193#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
194#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
195
196
197#define CONFIG_SYS_NS16550_SERIAL
198#define CONFIG_SYS_NS16550_REG_SIZE 1
199#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
200
201#define CONFIG_SYS_BAUDRATE_TABLE \
202 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
203
204#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
205#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
206
207
208
209
210#define CONFIG_SYS_I2C
211#define CONFIG_SYS_I2C_FSL
212#define CONFIG_SYS_FSL_I2C_SPEED 400000
213#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
214#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
215#define CONFIG_SYS_FSL_I2C2_SPEED 400000
216#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
217#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
218#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
219#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
220
221
222
223
224
225#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
226#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
227#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000
228#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000
229#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000
230#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
231#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000
232#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000
233
234#define CONFIG_SYS_PCIE1_NAME "Slot"
235#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000
236#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
237#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000
238#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000
239#define CONFIG_SYS_PCIE1_IO_VIRT 0xe2800000
240#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
241#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
242#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
243
244#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
245#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
246#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
247#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000
248
249#ifdef CONFIG_QE
250
251
252
253#define CONFIG_UEC_ETH
254#ifndef CONFIG_TSEC_ENET
255#define CONFIG_ETHPRIME "UEC0"
256#endif
257#define CONFIG_PHY_MODE_NEED_CHANGE
258#define CONFIG_eTSEC_MDIO_BUS
259
260#ifdef CONFIG_eTSEC_MDIO_BUS
261#define CONFIG_MIIM_ADDRESS 0xE0024520
262#endif
263
264#define CONFIG_UEC_ETH1
265
266#ifdef CONFIG_UEC_ETH1
267#define CONFIG_SYS_UEC1_UCC_NUM 0
268#define CONFIG_SYS_UEC1_RX_CLK QE_CLK_NONE
269#define CONFIG_SYS_UEC1_TX_CLK QE_CLK16
270#define CONFIG_SYS_UEC1_ETH_TYPE GIGA_ETH
271#define CONFIG_SYS_UEC1_PHY_ADDR 7
272#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
273#define CONFIG_SYS_UEC1_INTERFACE_SPEED 1000
274#endif
275
276#define CONFIG_UEC_ETH2
277
278#ifdef CONFIG_UEC_ETH2
279#define CONFIG_SYS_UEC2_UCC_NUM 1
280#define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE
281#define CONFIG_SYS_UEC2_TX_CLK QE_CLK16
282#define CONFIG_SYS_UEC2_ETH_TYPE GIGA_ETH
283#define CONFIG_SYS_UEC2_PHY_ADDR 1
284#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII_ID
285#define CONFIG_SYS_UEC2_INTERFACE_SPEED 1000
286#endif
287#endif
288
289#if defined(CONFIG_PCI)
290
291#undef CONFIG_PCI_SCAN_SHOW
292#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057
293
294#endif
295
296#if defined(CONFIG_TSEC_ENET)
297
298#define CONFIG_TSEC1 1
299#define CONFIG_TSEC1_NAME "eTSEC0"
300#define CONFIG_TSEC2 1
301#define CONFIG_TSEC2_NAME "eTSEC1"
302
303#define TSEC1_PHY_ADDR 2
304#define TSEC2_PHY_ADDR 3
305
306#define TSEC1_PHYIDX 0
307#define TSEC2_PHYIDX 0
308
309#define TSEC1_FLAGS TSEC_GIGABIT
310#define TSEC2_FLAGS TSEC_GIGABIT
311
312
313#define CONFIG_ETHPRIME "eTSEC0"
314
315#endif
316
317
318
319
320
321#define CONFIG_LOADS_ECHO 1
322#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
323
324
325
326
327#define CONFIG_BOOTP_BOOTFILESIZE
328
329#undef CONFIG_WATCHDOG
330
331
332
333
334#define CONFIG_SYS_LOAD_ADDR 0x2000000
335
336
337
338
339
340
341#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
342#define CONFIG_SYS_BOOTM_LEN (64 << 20)
343
344#if defined(CONFIG_CMD_KGDB)
345#define CONFIG_KGDB_BAUDRATE 230400
346#endif
347
348
349
350
351
352
353#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_UEC_ETH)
354#define CONFIG_HAS_ETH0
355#define CONFIG_HAS_ETH1
356#define CONFIG_HAS_ETH2
357#define CONFIG_HAS_ETH3
358#endif
359
360#define CONFIG_IPADDR 192.168.1.253
361
362#define CONFIG_HOSTNAME "unknown"
363#define CONFIG_ROOTPATH "/nfsroot"
364#define CONFIG_BOOTFILE "your.uImage"
365
366#define CONFIG_SERVERIP 192.168.1.1
367#define CONFIG_GATEWAYIP 192.168.1.1
368#define CONFIG_NETMASK 255.255.255.0
369
370#define CONFIG_LOADADDR 200000
371
372#define CONFIG_EXTRA_ENV_SETTINGS \
373 "netdev=eth0\0" \
374 "consoledev=ttyS0\0" \
375 "ramdiskaddr=600000\0" \
376 "ramdiskfile=your.ramdisk.u-boot\0" \
377 "fdtaddr=400000\0" \
378 "fdtfile=your.fdt.dtb\0" \
379 "nfsargs=setenv bootargs root=/dev/nfs rw " \
380 "nfsroot=$serverip:$rootpath " \
381 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
382 "console=$consoledev,$baudrate $othbootargs\0" \
383 "ramargs=setenv bootargs root=/dev/ram rw " \
384 "console=$consoledev,$baudrate $othbootargs\0" \
385
386#define CONFIG_NFSBOOTCOMMAND \
387 "run nfsargs;" \
388 "tftp $loadaddr $bootfile;" \
389 "tftp $fdtaddr $fdtfile;" \
390 "bootm $loadaddr - $fdtaddr"
391
392#define CONFIG_RAMBOOTCOMMAND \
393 "run ramargs;" \
394 "tftp $ramdiskaddr $ramdiskfile;" \
395 "tftp $loadaddr $bootfile;" \
396 "bootm $loadaddr $ramdiskaddr"
397
398#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
399
400#endif
401