1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Configuation settings for the bonito board 4 * 5 * Copyright (C) 2012 Renesas Solutions Corp. 6 */ 7 8#ifndef __ARMADILLO_800EVA_H 9#define __ARMADILLO_800EVA_H 10 11#define CONFIG_SH_GPIO_PFC 12 13#include <asm/arch/rmobile.h> 14 15#define BOARD_LATE_INIT 16 17#define CONFIG_TMU_TIMER 18#define CONFIG_SYS_TIMER_COUNTS_DOWN 19#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ 20#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) 21 22/* STACK */ 23#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 24#define STACK_AREA_SIZE 0xC000 25#define LOW_LEVEL_MERAM_STACK \ 26 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 27 28/* MEMORY */ 29#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 30#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) 31 32#define CONFIG_SYS_PBSIZE 256 33#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 34 35/* SCIF */ 36#define CONFIG_CONS_SCIF1 37#define SCIF0_BASE 0xe6c40000 38#define SCIF1_BASE 0xe6c50000 39#define SCIF2_BASE 0xe6c60000 40#define SCIF4_BASE 0xe6c80000 41#define CONFIG_SCIF_A 42 43#undef CONFIG_SYS_LOADS_BAUD_CHANGE 44 45#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) 46#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) 47#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ 48 64 * 1024 * 1024) 49 50#define CONFIG_SYS_MONITOR_BASE 0x00000000 51#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 52#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 53#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 54 55/* FLASH */ 56#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 57#define CONFIG_SYS_FLASH_BASE 0x00000000 58#define CONFIG_SYS_MAX_FLASH_SECT 512 59#define CONFIG_SYS_MAX_FLASH_BANKS 1 60#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } 61 62#define CONFIG_SYS_FLASH_ERASE_TOUT 3000 63#define CONFIG_SYS_FLASH_WRITE_TOUT 3000 64#define CONFIG_SYS_FLASH_LOCK_TOUT 3000 65#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 66 67/* ENV setting */ 68 69/* SH Ether */ 70#define CONFIG_SH_ETHER_USE_PORT 0 71#define CONFIG_SH_ETHER_PHY_ADDR 0x0 72#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 73#define CONFIG_SH_ETHER_SH7734_MII (0x01) 74#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 75#define CONFIG_BITBANGMII_MULTI 76 77/* Board Clock */ 78#define CONFIG_SYS_CLK_FREQ 50000000 79#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 80 81#endif /* __ARMADILLO_800EVA_H */ 82