LXR uboot/arch/arm/mach-exynos/spl

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2012 Samsung Electronics
   4 */
   5
   6#include <common.h>
   7#include <config.h>
   8#include <init.h>
   9#include <log.h>
  10#include <asm/global_data.h>
  11
  12#include <asm/cache.h>
  13#include <asm/arch/clock.h>
  14#include <asm/arch/clk.h>
  15#include <asm/arch/dmc.h>
  16#include <asm/arch/periph.h>
  17#include <asm/arch/pinmux.h>
  18#include <asm/arch/power.h>
  19#include <asm/arch/spl.h>
  20#include <asm/arch/spi.h>
  21
  22#include "common_setup.h"
  23#include "clock_init.h"
  24
  25DECLARE_GLOBAL_DATA_PTR;
  26
  27/* Index into irom ptr table */
  28enum index {
  29        MMC_INDEX,
  30        EMMC44_INDEX,
  31        EMMC44_END_INDEX,
  32        SPI_INDEX,
  33        USB_INDEX,
  34};
  35
  36/* IROM Function Pointers Table */
  37u32 irom_ptr_table[] = {
  38        [MMC_INDEX] = 0x02020030,       /* iROM Function Pointer-SDMMC boot */
  39        [EMMC44_INDEX] = 0x02020044,    /* iROM Function Pointer-EMMC4.4 boot*/
  40        [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
  41                                                -EMMC4.4 end boot operation */
  42        [SPI_INDEX] = 0x02020058,       /* iROM Function Pointer-SPI boot */
  43        [USB_INDEX] = 0x02020070,       /* iROM Function Pointer-USB boot*/
  44        };
  45
  46void *get_irom_func(int index)
  47{
  48        return (void *)*(u32 *)irom_ptr_table[index];
  49}
  50
  51#ifdef CONFIG_USB_BOOTING
  52/*
  53 * Set/clear program flow prediction and return the previous state.
  54 */
  55static int config_branch_prediction(int set_cr_z)
  56{
  57        unsigned int cr;
  58
  59        /* System Control Register: 11th bit Z Branch prediction enable */
  60        cr = get_cr();
  61        set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z);
  62
  63        return cr & CR_Z;
  64}
  65#endif
  66
  67#ifdef CONFIG_SPI_BOOTING
  68static void spi_rx_tx(struct exynos_spi *regs, int todo,
  69                        void *dinp, void const *doutp, int i)
  70{
  71        uint *rxp = (uint *)(dinp + (i * (32 * 1024)));
  72        int rx_lvl, tx_lvl;
  73        uint out_bytes, in_bytes;
  74
  75        out_bytes = todo;
  76        in_bytes = todo;
  77        setbits_le32(&regs->ch_cfg, SPI_CH_RST);
  78        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
  79        writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
  80
  81        while (in_bytes) {
  82                uint32_t spi_sts;
  83                int temp;
  84
  85                spi_sts = readl(&regs->spi_sts);
  86                rx_lvl = ((spi_sts >> 15) & 0x7f);
  87                tx_lvl = ((spi_sts >> 6) & 0x7f);
  88                while (tx_lvl < 32 && out_bytes) {
  89                        temp = 0xffffffff;
  90                        writel(temp, &regs->tx_data);
  91                        out_bytes -= 4;
  92                        tx_lvl += 4;
  93                }
  94                while (rx_lvl >= 4 && in_bytes) {
  95                        temp = readl(&regs->rx_data);
  96                        if (rxp)
  97                                *rxp++ = temp;
  98                        in_bytes -= 4;
  99                        rx_lvl -= 4;
 100                }
 101        }
 102}
 103
 104/*
 105 * Copy uboot from spi flash to RAM
 106 *
 107 * @parma uboot_size    size of u-boot to copy
 108 * @param uboot_addr    address in u-boot to copy
 109 */
 110static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
 111{
 112        int upto, todo;
 113        int i, timeout = 100;
 114        struct exynos_spi *regs = (struct exynos_spi *)CONFIG_SYS_SPI_BASE;
 115
 116        set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
 117        /* set the spi1 GPIO */
 118        exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
 119
 120        /* set pktcnt and enable it */
 121        writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
 122        /* set FB_CLK_SEL */
 123        writel(SPI_FB_DELAY_180, &regs->fb_clk);
 124        /* set CH_WIDTH and BUS_WIDTH as word */
 125        setbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
 126                                        SPI_MODE_BUS_WIDTH_WORD);
 127        clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */
 128
 129        /* clear rx and tx channel if set priveously */
 130        clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON);
 131
 132        setbits_le32(&regs->swap_cfg, SPI_RX_SWAP_EN |
 133                        SPI_RX_BYTE_SWAP |
 134                        SPI_RX_HWORD_SWAP);
 135
 136        /* do a soft reset */
 137        setbits_le32(&regs->ch_cfg, SPI_CH_RST);
 138        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
 139
 140        /* now set rx and tx channel ON */
 141        setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN);
 142        clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */
 143
 144        /* Send read instruction (0x3h) followed by a 24 bit addr */
 145        writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, &regs->tx_data);
 146
 147        /* waiting for TX done */
 148        while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)) {
 149                if (!timeout) {
 150                        debug("SPI TIMEOUT\n");
 151                        break;
 152                }
 153                timeout--;
 154        }
 155
 156        for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
 157                todo = min(uboot_size - upto, (unsigned int)(1 << 15));
 158                spi_rx_tx(regs, todo, (void *)(uboot_addr),
 159                          (void *)(SPI_FLASH_UBOOT_POS), i);
 160        }
 161
 162        setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */
 163
 164        /*
 165         * Let put controller mode to BYTE as
 166         * SPI driver does not support WORD mode yet
 167         */
 168        clrbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
 169                                        SPI_MODE_BUS_WIDTH_WORD);
 170        writel(0, &regs->swap_cfg);
 171
 172        /*
 173         * Flush spi tx, rx fifos and reset the SPI controller
 174         * and clear rx/tx channel
 175         */
 176        clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
 177        clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
 178        clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
 179}
 180#endif
 181
 182/*
 183* Copy U-Boot from mmc to RAM:
 184* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
 185* Pointer to API (Data transfer from mmc to ram)
 186*/
 187void copy_uboot_to_ram(void)
 188{
 189        unsigned int bootmode = BOOT_MODE_OM;
 190
 191        u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
 192        u32 offset = 0, size = 0;
 193#ifdef CONFIG_SPI_BOOTING
 194        struct spl_machine_param *param = spl_get_machine_params();
 195#endif
 196#ifdef CONFIG_SUPPORT_EMMC_BOOT
 197        u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
 198        void (*end_bootop_from_emmc)(void);
 199#endif
 200#ifdef CONFIG_USB_BOOTING
 201        int is_cr_z_set;
 202        unsigned int sec_boot_check;
 203
 204        /*
 205         * Note that older hardware (before Exynos5800) does not expect any
 206         * arguments, but it does not hurt to pass them, so a common function
 207         * prototype is used.
 208         */
 209        u32 (*usb_copy)(u32 num_of_block, u32 *dst);
 210
 211        /* Read iRAM location to check for secondary USB boot mode */
 212        sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE);
 213        if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT)
 214                bootmode = BOOT_MODE_USB;
 215#endif
 216
 217        if (bootmode == BOOT_MODE_OM)
 218                bootmode = get_boot_mode();
 219
 220        switch (bootmode) {
 221#ifdef CONFIG_SPI_BOOTING
 222        case BOOT_MODE_SERIAL:
 223                /* Customised function to copy u-boot from SF */
 224                exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
 225                break;
 226#endif
 227        case BOOT_MODE_SD:
 228                offset = BL2_START_OFFSET;
 229                size = BL2_SIZE_BLOC_COUNT;
 230                copy_bl2 = get_irom_func(MMC_INDEX);
 231                break;
 232#ifdef CONFIG_SUPPORT_EMMC_BOOT
 233        case BOOT_MODE_EMMC:
 234                /* Set the FSYS1 clock divisor value for EMMC boot */
 235                emmc_boot_clk_div_set();
 236
 237                copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
 238                end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
 239
 240                copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
 241                end_bootop_from_emmc();
 242                break;
 243#endif
 244#ifdef CONFIG_USB_BOOTING
 245        case BOOT_MODE_USB:
 246                /*
 247                 * iROM needs program flow prediction to be disabled
 248                 * before copy from USB device to RAM
 249                 */
 250                is_cr_z_set = config_branch_prediction(0);
 251                usb_copy = get_irom_func(USB_INDEX);
 252                usb_copy(0, (u32 *)CONFIG_SYS_TEXT_BASE);
 253                config_branch_prediction(is_cr_z_set);
 254                break;
 255#endif
 256        default:
 257                break;
 258        }
 259
 260        if (copy_bl2)
 261                copy_bl2(offset, size, CONFIG_SYS_TEXT_BASE);
 262}
 263
 264void memzero(void *s, size_t n)
 265{
 266        char *ptr = s;
 267        size_t i;
 268
 269        for (i = 0; i < n; i++)
 270                *ptr++ = '\0';
 271}
 272
 273/**
 274 * Set up the U-Boot global_data pointer
 275 *
 276 * This sets the address of the global data, and sets up basic values.
 277 *
 278 * @param gdp   Value to give to gd
 279 */
 280static void setup_global_data(gd_t *gdp)
 281{
 282        gd = gdp;
 283        memzero((void *)gd, sizeof(gd_t));
 284        gd->flags |= GD_FLG_RELOC;
 285        gd->baudrate = CONFIG_BAUDRATE;
 286        gd->have_console = 1;
 287}
 288
 289void board_init_f(unsigned long bootflag)
 290{
 291        __aligned(8) gd_t local_gd;
 292        __attribute__((noreturn)) void (*uboot)(void);
 293
 294        setup_global_data(&local_gd);
 295
 296        if (do_lowlevel_init())
 297                power_exit_wakeup();
 298
 299        copy_uboot_to_ram();
 300
 301        /* Jump to U-Boot image */
 302        uboot = (void *)CONFIG_SYS_TEXT_BASE;
 303        (*uboot)();
 304        /* Never returns Here */
 305}
 306
 307/* Place Holders */
 308void board_init_r(gd_t *id, ulong dest_addr)
 309{
 310        /* Function attribute is no-return */
 311        /* This Function never executes */
 312        while (1)
 313                ;
 314}
 315