LXR uboot/arch/arm/mach-rockchip/tpl.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4 */
   5
   6#include <common.h>
   7#include <debug_uart.h>
   8#include <dm.h>
   9#include <hang.h>
  10#include <init.h>
  11#include <log.h>
  12#include <ram.h>
  13#include <spl.h>
  14#include <version.h>
  15#include <asm/io.h>
  16#include <asm/arch-rockchip/bootrom.h>
  17#include <linux/bitops.h>
  18
  19#define TIMER_LOAD_COUNT_L      0x00
  20#define TIMER_LOAD_COUNT_H      0x04
  21#define TIMER_CONTROL_REG       0x10
  22#define TIMER_EN        0x1
  23#define TIMER_FMODE     BIT(0)
  24#define TIMER_RMODE     BIT(1)
  25
  26__weak void rockchip_stimer_init(void)
  27{
  28        /* If Timer already enabled, don't re-init it */
  29        u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  30
  31        if (reg & TIMER_EN)
  32                return;
  33
  34#ifndef CONFIG_ARM64
  35        asm volatile("mcr p15, 0, %0, c14, c0, 0"
  36                     : : "r"(COUNTER_FREQUENCY));
  37#endif
  38
  39        writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  40        writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  41        writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  42        writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  43               TIMER_CONTROL_REG);
  44}
  45
  46void board_init_f(ulong dummy)
  47{
  48        struct udevice *dev;
  49        int ret;
  50
  51#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
  52        /*
  53         * Debug UART can be used from here if required:
  54         *
  55         * debug_uart_init();
  56         * printch('a');
  57         * printhex8(0x1234);
  58         * printascii("string");
  59         */
  60        debug_uart_init();
  61#ifdef CONFIG_TPL_BANNER_PRINT
  62        printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
  63                                U_BOOT_TIME ")\n");
  64#endif
  65#endif
  66        ret = spl_early_init();
  67        if (ret) {
  68                debug("spl_early_init() failed: %d\n", ret);
  69                hang();
  70        }
  71
  72        /* Init secure timer */
  73        rockchip_stimer_init();
  74        /* Init ARM arch timer in arch/arm/cpu/ */
  75        timer_init();
  76
  77        ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  78        if (ret) {
  79                printf("DRAM init failed: %d\n", ret);
  80                return;
  81        }
  82}
  83
  84int board_return_to_bootrom(struct spl_image_info *spl_image,
  85                            struct spl_boot_device *bootdev)
  86{
  87        back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  88
  89        return 0;
  90}
  91
  92u32 spl_boot_device(void)
  93{
  94        return BOOT_DEVICE_BOOTROM;
  95}
  96