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11#include <common.h>
12#include <command.h>
13#include <env.h>
14#include <hwconfig.h>
15#include <image.h>
16#include <init.h>
17#include <net.h>
18#include <pci.h>
19#include <i2c.h>
20#include <miiphy.h>
21#include <linux/libfdt.h>
22#include <fdt_support.h>
23#include <fsl_mdio.h>
24#include <tsec.h>
25#include <ioports.h>
26#include <netdev.h>
27#include <micrel.h>
28#include <spi_flash.h>
29#include <mmc.h>
30#include <linux/ctype.h>
31#include <asm/fsl_serdes.h>
32#include <asm/gpio.h>
33#include <asm/processor.h>
34#include <asm/mmu.h>
35#include <asm/cache.h>
36#include <asm/immap_85xx.h>
37#include <asm/fsl_pci.h>
38#include <fsl_ddr_sdram.h>
39#include <asm/io.h>
40#include <asm/fsl_law.h>
41#include <asm/fsl_lbc.h>
42#include <asm/mp.h>
43#include "ucp1020.h"
44
45void spi_set_speed(struct spi_slave *slave, uint hz)
46{
47
48}
49
50
51
52
53int name_to_gpio(const char *name)
54{
55 int gpio = 31 - simple_strtoul(name, NULL, 10);
56
57 if (gpio < 16)
58 gpio = -1;
59
60 return gpio;
61}
62
63void board_gpio_init(void)
64{
65 int i;
66 char envname[8], *val;
67
68 for (i = 0; i < GPIO_MAX_NUM; i++) {
69 sprintf(envname, "GPIO%d", i);
70 val = env_get(envname);
71 if (val) {
72 char direction = toupper(val[0]);
73 char level = toupper(val[1]);
74
75 if (direction == 'I') {
76 gpio_direction_input(i);
77 } else {
78 if (direction == 'O') {
79 if (level == '1')
80 gpio_direction_output(i, 1);
81 else
82 gpio_direction_output(i, 0);
83 }
84 }
85 }
86 }
87
88 val = env_get("PCIE_OFF");
89 if (val) {
90 gpio_direction_input(GPIO_PCIE1_EN);
91 gpio_direction_input(GPIO_PCIE2_EN);
92 } else {
93 gpio_direction_output(GPIO_PCIE1_EN, 1);
94 gpio_direction_output(GPIO_PCIE2_EN, 1);
95 }
96
97 val = env_get("SDHC_CDWP_OFF");
98 if (!val) {
99 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
100
101 setbits_be32(&gur->pmuxcr,
102 (MPC85xx_PMUXCR_SDHC_CD | MPC85xx_PMUXCR_SDHC_WP));
103 }
104}
105
106int board_early_init_f(void)
107{
108 return 0;
109}
110
111int checkboard(void)
112{
113 printf("Board: %s\n", CONFIG_BOARDNAME_LOCAL);
114 board_gpio_init();
115#ifdef CONFIG_MMC
116 printf("SD/MMC: 4-bit Mode\n");
117#endif
118
119 return 0;
120}
121
122#ifdef CONFIG_PCI
123void pci_init_board(void)
124{
125 fsl_pcie_init_board(0);
126}
127#endif
128
129int board_early_init_r(void)
130{
131 const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
132 const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
133
134
135
136
137
138
139
140 flush_dcache();
141 invalidate_icache();
142
143
144 disable_tlb(flash_esel);
145
146 set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
147 MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G,
148 0, flash_esel, BOOKE_PAGESZ_64M, 1);
149
150 return 0;
151}
152
153int board_phy_config(struct phy_device *phydev)
154{
155#if defined(CONFIG_PHY_MICREL_KSZ9021)
156 int regval;
157 static int cnt;
158
159 if (cnt++ == 0)
160 printf("PHYs address [");
161
162 if (phydev->addr == TSEC1_PHY_ADDR || phydev->addr == TSEC3_PHY_ADDR) {
163 regval =
164 ksz9021_phy_extended_read(phydev,
165 MII_KSZ9021_EXT_STRAP_STATUS);
166
167
168
169 ksz9021_phy_extended_write(phydev,
170 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
171 0x6666);
172
173
174
175 ksz9021_phy_extended_write(phydev,
176 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
177 0xf6f6);
178 printf("0x%x", (regval & 0x1f));
179 } else {
180 printf("0x%x", (TSEC2_PHY_ADDR & 0x1f));
181 }
182 if (cnt == 3)
183 printf("] ");
184 else
185 printf(",");
186#endif
187
188#if defined(CONFIG_PHY_MICREL_KSZ9031_DEBUG)
189 regval = ksz9031_phy_extended_read(phydev, 2, 0x01, 0x4000);
190 if (regval >= 0)
191 printf(" (ADDR 0x%x) ", regval & 0x1f);
192#endif
193
194 return 0;
195}
196
197int last_stage_init(void)
198{
199 static char newkernelargs[256];
200 static u8 id1[16];
201 static u8 id2;
202#ifdef CONFIG_MMC
203 struct mmc *mmc;
204#endif
205 char *sval, *kval;
206
207 if (i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 7, 1, &id1[0], 2) < 0) {
208 printf("Error reading i2c IDT6V49205B information!\n");
209 } else {
210 printf("IDT6V49205B(0x%02x): ready\n", id1[1]);
211 i2c_read(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
212 if (!(id1[1] & 0x02)) {
213 id1[1] |= 0x02;
214 i2c_write(CONFIG_SYS_I2C_IDT6V49205B, 4, 1, &id1[0], 2);
215 asm("nop; nop");
216 }
217 }
218
219 if (i2c_read(CONFIG_SYS_I2C_NCT72_ADDR, 0xFE, 1, &id2, 1) < 0)
220 printf("Error reading i2c NCT72 information!\n");
221 else
222 printf("NCT72(0x%x): ready\n", id2);
223
224 kval = env_get("kernelargs");
225
226#ifdef CONFIG_MMC
227 mmc = find_mmc_device(0);
228 if (mmc)
229 if (!mmc_init(mmc)) {
230 printf("MMC/SD card detected\n");
231 if (kval) {
232 int n = strlen(defkargs);
233 char *tmp = strstr(kval, defkargs);
234
235 *tmp = 0;
236 strcpy(newkernelargs, kval);
237 strcat(newkernelargs, " ");
238 strcat(newkernelargs, mmckargs);
239 strcat(newkernelargs, " ");
240 strcat(newkernelargs, &tmp[n]);
241 env_set("kernelargs", newkernelargs);
242 } else {
243 env_set("kernelargs", mmckargs);
244 }
245 }
246#endif
247 get_arc_info();
248
249 if (kval) {
250 sval = env_get("SERIAL");
251 if (sval) {
252 strcpy(newkernelargs, "SN=");
253 strcat(newkernelargs, sval);
254 strcat(newkernelargs, " ");
255 strcat(newkernelargs, kval);
256 env_set("kernelargs", newkernelargs);
257 }
258 } else {
259 printf("Error reading kernelargs env variable!\n");
260 }
261
262 return 0;
263}
264
265int board_eth_init(struct bd_info *bis)
266{
267 struct fsl_pq_mdio_info mdio_info;
268 struct tsec_info_struct tsec_info[4];
269#ifdef CONFIG_TSEC2
270 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
271#endif
272 int num = 0;
273
274#ifdef CONFIG_TSEC1
275 SET_STD_TSEC_INFO(tsec_info[num], 1);
276 num++;
277#endif
278#ifdef CONFIG_TSEC2
279 SET_STD_TSEC_INFO(tsec_info[num], 2);
280 if (is_serdes_configured(SGMII_TSEC2)) {
281 if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_SGMII2_DIS)) {
282 puts("eTSEC2 is in sgmii mode.\n");
283 tsec_info[num].flags |= TSEC_SGMII;
284 tsec_info[num].phyaddr = TSEC2_PHY_ADDR_SGMII;
285 }
286 }
287 num++;
288#endif
289#ifdef CONFIG_TSEC3
290 SET_STD_TSEC_INFO(tsec_info[num], 3);
291 num++;
292#endif
293
294 if (!num) {
295 printf("No TSECs initialized\n");
296 return 0;
297 }
298
299 mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
300 mdio_info.name = DEFAULT_MII_NAME;
301
302 fsl_pq_mdio_init(bis, &mdio_info);
303
304 tsec_eth_init(bis, tsec_info, num);
305
306 return pci_eth_init(bis);
307}
308
309#ifdef CONFIG_OF_BOARD_SETUP
310int ft_board_setup(void *blob, struct bd_info *bd)
311{
312 phys_addr_t base;
313 phys_size_t size;
314 const char *soc_usb_compat = "fsl-usb2-dr";
315 int err, usb1_off, usb2_off;
316
317 ft_cpu_setup(blob, bd);
318
319 base = env_get_bootm_low();
320 size = env_get_bootm_size();
321
322 fdt_fixup_memory(blob, (u64)base, (u64)size);
323
324 FT_FSL_PCI_SETUP;
325
326#if defined(CONFIG_HAS_FSL_DR_USB)
327 fsl_fdt_fixup_dr_usb(blob, bd);
328#endif
329
330#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
331
332 if (hwconfig("usb2")) {
333 const char *soc_elbc_compat = "fsl,p1020-elbc";
334 int off = fdt_node_offset_by_compatible(blob, -1,
335 soc_elbc_compat);
336 if (off < 0) {
337 printf
338 ("WARNING: could not find compatible node %s: %s\n",
339 soc_elbc_compat, fdt_strerror(off));
340 return off;
341 }
342 err = fdt_del_node(blob, off);
343 if (err < 0) {
344 printf("WARNING: could not remove %s: %s\n",
345 soc_elbc_compat, fdt_strerror(err));
346 }
347 return err;
348 }
349#endif
350
351
352 usb1_off = fdt_node_offset_by_compatible(blob, -1, soc_usb_compat);
353 if (usb1_off < 0) {
354 printf("WARNING: could not find compatible node %s: %s.\n",
355 soc_usb_compat, fdt_strerror(usb1_off));
356 return usb1_off;
357 }
358 usb2_off =
359 fdt_node_offset_by_compatible(blob, usb1_off, soc_usb_compat);
360 if (usb2_off < 0) {
361 printf("WARNING: could not find compatible node %s: %s.\n",
362 soc_usb_compat, fdt_strerror(usb2_off));
363 return usb2_off;
364 }
365 err = fdt_del_node(blob, usb2_off);
366 if (err < 0) {
367 printf("WARNING: could not remove %s: %s.\n",
368 soc_usb_compat, fdt_strerror(err));
369 }
370 return 0;
371}
372#endif
373
