LXR uboot/board/isee/igep00x0/common.c

   1// SPDX-License-Identifier: GPL-2.0+
   2
   3#include <common.h>
   4#include <twl4030.h>
   5#include <asm/global_data.h>
   6#include <asm/io.h>
   7#include <asm/omap_mmc.h>
   8#include <asm/arch/mux.h>
   9#include <asm/arch/sys_proto.h>
  10#include <jffs2/load_kernel.h>
  11#include <linux/delay.h>
  12#include <linux/mtd/rawnand.h>
  13#include "igep00x0.h"
  14
  15DECLARE_GLOBAL_DATA_PTR;
  16
  17/*
  18 * Routine: set_muxconf_regs
  19 * Description: Setting up the configuration Mux registers specific to the
  20 *              hardware. Many pins need to be moved from protect to primary
  21 *              mode.
  22 */
  23void set_muxconf_regs(void)
  24{
  25        MUX_DEFAULT();
  26}
  27
  28/*
  29 * Routine: board_init
  30 * Description: Early hardware init.
  31 */
  32int board_init(void)
  33{
  34        int loops = 100;
  35
  36        /* find out flash memory type, assume NAND first */
  37        gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
  38        gpmc_init();
  39
  40        /* Issue a RESET and then READID */
  41        writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd);
  42        writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd);
  43        while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY)
  44                                                != NAND_STATUS_READY) {
  45                udelay(1);
  46                if (--loops == 0) {
  47                        gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
  48                        gpmc_init();    /* reinitialize for OneNAND */
  49                        break;
  50                }
  51        }
  52
  53        /* boot param addr */
  54        gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  55
  56        return 0;
  57}
  58
  59#if defined(CONFIG_MMC)
  60int board_mmc_init(struct bd_info *bis)
  61{
  62        return omap_mmc_init(0, 0, 0, -1, -1);
  63}
  64
  65void board_mmc_power_init(void)
  66{
  67        twl4030_power_mmc_init(0);
  68}
  69#endif
  70