LXR uboot/include/configs/colibri

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright 2013-2019 Toradex, Inc.
   4 *
   5 * Configuration settings for the Toradex Colibri iMX6
   6 */
   7
   8#ifndef __CONFIG_H
   9#define __CONFIG_H
  10
  11#include <linux/stringify.h>
  12
  13#include "mx6_common.h"
  14
  15#undef CONFIG_DISPLAY_BOARDINFO
  16
  17#include <asm/arch/imx-regs.h>
  18#include <asm/mach-imx/gpio.h>
  19
  20#ifdef CONFIG_SPL
  21#include "imx6_spl.h"
  22#endif
  23
  24#define CONFIG_CMDLINE_TAG
  25#define CONFIG_SETUP_MEMORY_TAGS
  26#define CONFIG_INITRD_TAG
  27#define CONFIG_REVISION_TAG
  28#define CONFIG_SERIAL_TAG
  29
  30/* Size of malloc() pool */
  31#define CONFIG_SYS_MALLOC_LEN           (32 * 1024 * 1024)
  32
  33#define CONFIG_MXC_UART_BASE            UART1_BASE
  34
  35/* I2C Configs */
  36#define CONFIG_SYS_I2C_MXC
  37#define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  38#define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  39#define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  40#define CONFIG_SYS_I2C_SPEED            100000
  41#define CONFIG_SYS_MXC_I2C3_SPEED       400000
  42
  43/* MMC Configs */
  44#define CONFIG_SYS_FSL_ESDHC_ADDR       0
  45#define CONFIG_SYS_FSL_USDHC_NUM        2
  46
  47/* USB Configs */
  48/* Host */
  49#define CONFIG_USB_MAX_CONTROLLER_COUNT         2
  50#define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
  51#define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
  52#define CONFIG_MXC_USB_FLAGS            0
  53/* Client */
  54#define CONFIG_USBD_HS
  55
  56/* Framebuffer and LCD */
  57#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
  58#define CONFIG_VIDEO_LOGO
  59#define CONFIG_VIDEO_BMP_LOGO
  60#define CONFIG_IMX_HDMI
  61#define CONFIG_IMX_VIDEO_SKIP
  62
  63/* Command definition */
  64
  65#undef CONFIG_IPADDR
  66#define CONFIG_IPADDR                   192.168.10.2
  67#define CONFIG_NETMASK                  255.255.255.0
  68#undef CONFIG_SERVERIP
  69#define CONFIG_SERVERIP                 192.168.10.1
  70
  71#define CONFIG_LOADADDR                 0x12000000
  72
  73#ifndef CONFIG_SPL_BUILD
  74#define BOOT_TARGET_DEVICES(func) \
  75        func(MMC, mmc, 0) \
  76        func(MMC, mmc, 1) \
  77        func(MMC, mmc, 0) \
  78        func(USB, usb, 0) \
  79        func(DHCP, dhcp, na)
  80#include <config_distro_bootcmd.h>
  81#undef BOOTENV_RUN_NET_USB_START
  82#define BOOTENV_RUN_NET_USB_START ""
  83#else /* CONFIG_SPL_BUILD */
  84#define BOOTENV
  85#endif /* CONFIG_SPL_BUILD */
  86
  87#define UBOOT_UPDATE \
  88        "uboot_hwpart=1\0" \
  89        "uboot_blk=8a\0" \
  90        "uboot_spl_blk=2\0" \
  91        "set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && " \
  92                "setexpr blkcnt ${blkcnt} / 0x200\0" \
  93        "update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
  94                "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \
  95        "update_spl=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
  96                "mmc write ${loadaddr} ${uboot_spl_blk} ${blkcnt}\0"
  97
  98#define MEM_LAYOUT_ENV_SETTINGS \
  99        "bootm_size=0x10000000\0" \
 100        "fdt_addr_r=0x12100000\0" \
 101        "kernel_addr_r=0x11000000\0" \
 102        "pxefile_addr_r=0x17100000\0" \
 103        "ramdisk_addr_r=0x12200000\0" \
 104        "scriptaddr=0x17000000\0"
 105
 106#define NFS_BOOTCMD \
 107        "nfsargs=ip=:::::eth0:on root=/dev/nfs rw\0" \
 108        "nfsboot=run setup; " \
 109                "setenv bootargs ${defargs} ${nfsargs} ${setupargs} " \
 110                "${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \
 111                "run nfsdtbload; dhcp ${kernel_addr_r} " \
 112                "&& run fdt_fixup && bootz ${kernel_addr_r} ${dtbparam}\0" \
 113        "nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} ${fdt_file} " \
 114                "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0"
 115
 116#define FDT_FILE "imx6dl-colibri-eval-v3.dtb"
 117#define CONFIG_EXTRA_ENV_SETTINGS \
 118        BOOTENV \
 119        "bootcmd=run distro_bootcmd; " \
 120                "usb start ; " \
 121                "setenv stdout serial,vidconsole; " \
 122                "setenv stdin serial,usbkbd\0" \
 123        "boot_file=zImage\0" \
 124        "console=ttymxc0\0" \
 125        "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
 126        "fdt_file=" FDT_FILE "\0" \
 127        "fdtfile=" FDT_FILE "\0" \
 128        "fdt_fixup=;\0" \
 129        MEM_LAYOUT_ENV_SETTINGS \
 130        NFS_BOOTCMD \
 131        UBOOT_UPDATE \
 132        "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
 133                "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
 134                "flash_eth.img && source ${loadaddr}\0" \
 135        "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \
 136                "${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
 137                "source ${loadaddr}\0" \
 138        "setup=setenv setupargs fec_mac=${ethaddr} " \
 139                "consoleblank=0 no_console_suspend=1 console=tty1 " \
 140                "console=${console},${baudrate}n8\0 " \
 141        "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
 142        "setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
 143                "load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
 144                "source ${loadaddr}\0" \
 145        "splashpos=m,m\0" \
 146        "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
 147        "vidargs=video=mxcfb0:dev=lcd,640x480M@60,if=RGB666 " \
 148                "video=mxcfb1:off fbmem=8M\0 "
 149
 150/* Miscellaneous configurable options */
 151#undef CONFIG_SYS_CBSIZE
 152#define CONFIG_SYS_CBSIZE               1024
 153#undef CONFIG_SYS_MAXARGS
 154#define CONFIG_SYS_MAXARGS              48
 155
 156#define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 157
 158/* Physical Memory Map */
 159#define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 160
 161#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 162#define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 163#define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 164
 165#define CONFIG_SYS_INIT_SP_OFFSET \
 166        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 167#define CONFIG_SYS_INIT_SP_ADDR \
 168        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 169
 170#endif  /* __CONFIG_H */
 171