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9#ifndef __M53MENLO_CONFIG_H__
10#define __M53MENLO_CONFIG_H__
11
12#include <asm/arch/imx-regs.h>
13
14#define CONFIG_REVISION_TAG
15#define CONFIG_SYS_FSL_CLK
16
17#define CONFIG_TIMESTAMP
18
19
20
21
22#define PHYS_SDRAM_1 CSD0_BASE_ADDR
23#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
24#define PHYS_SDRAM_2 CSD1_BASE_ADDR
25#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
26#define PHYS_SDRAM_SIZE (gd->ram_size)
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
29#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
30#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
31#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
32
33#define CONFIG_SYS_INIT_SP_OFFSET \
34 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35#define CONFIG_SYS_INIT_SP_ADDR \
36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
37
38
39
40
41#define CONFIG_SYS_CBSIZE 1024
42#define CONFIG_SYS_MAXARGS 32
43#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
44
45
46
47
48
49#define CONFIG_MXC_UART_BASE UART1_BASE
50
51
52
53
54#ifdef CONFIG_CMD_MMC
55#define CONFIG_SYS_FSL_ESDHC_ADDR 0
56#define CONFIG_SYS_FSL_ESDHC_NUM 1
57#endif
58
59
60
61
62#ifdef CONFIG_CMD_NAND
63#define CONFIG_SYS_MAX_NAND_DEVICE 1
64#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
65#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
66#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
67#define CONFIG_SYS_NAND_LARGEPAGE
68#define CONFIG_MXC_NAND_HWECC
69
70
71#define CONFIG_ENV_RANGE (0x00080000)
72#endif
73
74
75
76
77#ifdef CONFIG_CMD_NET
78#define CONFIG_FEC_MXC
79#define IMX_FEC_BASE FEC_BASE_ADDR
80#define CONFIG_FEC_MXC_PHYADDR 0x0
81#define CONFIG_MII
82#define CONFIG_DISCOVER_PHY
83#define CONFIG_FEC_XCV_TYPE RMII
84#define CONFIG_ETHPRIME "FEC0"
85#endif
86
87
88
89
90#ifdef CONFIG_CMD_I2C
91#define CONFIG_SYS_I2C
92#define CONFIG_SYS_I2C_MXC
93#define CONFIG_SYS_I2C_MXC_I2C1
94#define CONFIG_SYS_I2C_MXC_I2C2
95#define CONFIG_SYS_I2C_MXC_I2C3
96#define CONFIG_SYS_RTC_BUS_NUM 1
97#endif
98
99
100
101
102#ifdef CONFIG_CMD_DATE
103#define CONFIG_SYS_I2C_RTC_ADDR 0x68
104#define CONFIG_SYS_M41T11_BASE_YEAR 2000
105#endif
106
107
108
109
110#ifdef CONFIG_CMD_USB
111#define CONFIG_MXC_USB_PORT 1
112#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
113#define CONFIG_MXC_USB_FLAGS 0
114#endif
115
116
117
118
119#ifdef CONFIG_CMD_SATA
120#define CONFIG_SYS_SATA_MAX_DEVICE 1
121#define CONFIG_DWC_AHSATA_PORT_ID 0
122#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
123#define CONFIG_LBA48
124#endif
125
126
127
128
129#define CONFIG_VIDEO_LOGO
130#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
131
132
133#define CONFIG_SYS_LDB_CLOCK 33260000
134#define CONFIG_IMX_VIDEO_SKIP
135
136
137#define CONFIG_FSL_IIM
138
139
140
141
142
143
144#define CONFIG_CMDLINE_TAG
145#define CONFIG_INITRD_TAG
146#define CONFIG_REVISION_TAG
147#define CONFIG_SETUP_MEMORY_TAGS
148#define CONFIG_BOOTFILE "boot/fitImage"
149#define CONFIG_LOADADDR 0x70800000
150#define CONFIG_BOOTCOMMAND "run mmc_mmc"
151#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152
153
154
155
156#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
157#define CONFIG_SPL_PAD_TO 0x8000
158#define CONFIG_SPL_STACK 0x70004000
159
160#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
161#define CONFIG_SYS_NAND_PAGE_SIZE 2048
162#define CONFIG_SYS_NAND_OOBSIZE 64
163#define CONFIG_SYS_NAND_PAGE_COUNT 64
164#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
165#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
166
167
168
169
170#define CONFIG_HOSTNAME "m53menlo"
171
172#define CONFIG_EXTRA_ENV_SETTINGS \
173 "consdev=ttymxc0\0" \
174 "baudrate=115200\0" \
175 "bootscript=boot.scr\0" \
176 "mmcdev=0\0" \
177 "mmcpart=1\0" \
178 "rootpath=/srv/\0" \
179 "kernel_addr_r=0x72000000\0" \
180 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
181 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
182 "netdev=eth0\0" \
183 "splashsource=mmc_fs\0" \
184 "splashfile=boot/usplash.bmp.gz\0" \
185 "splashimage=0x88000000\0" \
186 "splashpos=m,m\0" \
187 "stdout=serial,vidconsole\0" \
188 "stderr=serial,vidconsole\0" \
189 "addcons=" \
190 "setenv bootargs ${bootargs} " \
191 "console=${consdev},${baudrate}\0" \
192 "addip=" \
193 "setenv bootargs ${bootargs} " \
194 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
195 ":${hostname}:${netdev}:off\0" \
196 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
197 "addmisc=" \
198 "setenv bootargs ${bootargs} ${miscargs}\0" \
199 "addargs=run addcons addmisc addmtd\0" \
200 "mmcload=" \
201 "mmc rescan ; load mmc ${mmcdev}:${mmcpart} " \
202 "${kernel_addr_r} ${bootfile}\0" \
203 "miscargs=nohlt panic=1\0" \
204 "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw " \
205 "rootwait\0" \
206 "mmc_mmc=" \
207 "run mmcload mmcargs addargs ; " \
208 "bootm ${kernel_addr_r}\0" \
209 "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
210 "net_nfs=" \
211 "run netload nfsargs addip addargs ; " \
212 "bootm ${kernel_addr_r}\0" \
213 "nfsargs=" \
214 "setenv bootargs root=/dev/nfs rw " \
215 "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0" \
216 "try_bootscript=" \
217 "mmc rescan;" \
218 "if test -e mmc 0:1 ${bootscript} ; then " \
219 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
220 "then ; " \
221 "echo Running bootscript... ; " \
222 "source ${kernel_addr_r} ; " \
223 "fi ; " \
224 "fi\0"
225
226#if defined(CONFIG_SPL_BUILD)
227#undef CONFIG_WATCHDOG
228#define CONFIG_HW_WATCHDOG
229#endif
230
231#endif
232
