1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 4 * Copyright (C) 2014 Bachmann electronic GmbH 5 */ 6 7#ifndef __CONFIG_H 8#define __CONFIG_H 9 10#include "mx6_common.h" 11 12/* Size of malloc() pool */ 13#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 14 15/* UART Configs */ 16#define CONFIG_MXC_UART_BASE UART1_BASE 17 18/* SF Configs */ 19 20/* IO expander */ 21#define CONFIG_PCA953X 22#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 23#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } 24 25/* I2C Configs */ 26#define CONFIG_SYS_I2C 27#define CONFIG_SYS_I2C_MXC 28#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 29#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 30#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 31#define CONFIG_SYS_I2C_SPEED 100000 32 33/* OCOTP Configs */ 34#define CONFIG_IMX_OTP 35#define IMX_OTP_BASE OCOTP_BASE_ADDR 36#define IMX_OTP_ADDR_MAX 0x7F 37#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA 38#define IMX_OTPWRITE_ENABLED 39 40/* MMC Configs */ 41#define CONFIG_SYS_FSL_ESDHC_ADDR 0 42#define CONFIG_SYS_FSL_USDHC_NUM 2 43 44/* USB Configs */ 45#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 46#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 47 48/* 49 * SATA Configs 50 */ 51#ifdef CONFIG_CMD_SATA 52#define CONFIG_SYS_SATA_MAX_DEVICE 1 53#define CONFIG_DWC_AHSATA_PORT_ID 0 54#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 55#define CONFIG_LBA48 56#endif 57 58/* SPL */ 59#ifdef CONFIG_SPL 60#include "imx6_spl.h" 61#endif 62 63#define CONFIG_FEC_MXC 64#define IMX_FEC_BASE ENET_BASE_ADDR 65#define CONFIG_FEC_XCV_TYPE MII100 66#define CONFIG_ETHPRIME "FEC" 67#define CONFIG_FEC_MXC_PHYADDR 0x5 68 69#ifndef CONFIG_SPL 70#define CONFIG_ENV_EEPROM_IS_ON_I2C 71#define CONFIG_SYS_I2C_EEPROM_BUS 1 72#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 73#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 74#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 75#endif 76 77/* Physical Memory Map */ 78#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 79 80#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 81#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 82#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 83 84#define CONFIG_SYS_INIT_SP_OFFSET \ 85 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 86#define CONFIG_SYS_INIT_SP_ADDR \ 87 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 88 89/* Environment organization */ 90/* M25P16 has an erase size of 64 KiB */ 91 92#define CONFIG_BOOTP_SERVERIP 93#define CONFIG_BOOTP_BOOTFILE 94 95#endif /* __CONFIG_H */ 96