1
2
3
4
5
6
7
8
9#ifndef __CONFIG_TRATS_H
10#define __CONFIG_TRATS_H
11
12#include <configs/exynos4-common.h>
13
14#define CONFIG_TRATS
15
16#define CONFIG_TIZEN
17
18#define CONFIG_SYS_L2CACHE_OFF
19#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
23
24
25#define CONFIG_SYS_SDRAM_BASE 0x40000000
26#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
27#define SDRAM_BANK_SIZE (256 << 20)
28
29
30#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
31
32#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
33
34#define CONFIG_BOOTCOMMAND "run autoboot"
35
36#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
37 - GENERATED_GBL_DATA_SIZE)
38
39#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)
40
41#define CONFIG_SYS_MONITOR_BASE 0x00000000
42
43#define CONFIG_BOOTBLOCK "10"
44#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
45
46
47#define PARTS_CSA "csa-mmc"
48#define PARTS_BOOT "boot"
49#define PARTS_QBOOT "qboot"
50#define PARTS_CSC "csc"
51#define PARTS_ROOT "platform"
52#define PARTS_DATA "data"
53#define PARTS_UMS "ums"
54
55#define PARTS_DEFAULT \
56 "uuid_disk=${uuid_gpt_disk};" \
57 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
58 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
59 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
60 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
61 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
62 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
63 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
64
65#define CONFIG_DFU_ALT \
66 "u-boot raw 0x80 0x400;" \
67 "/uImage ext4 0 2;" \
68 "/modem.bin ext4 0 2;" \
69 "/exynos4210-trats.dtb ext4 0 2;" \
70 ""PARTS_CSA" part 0 1;" \
71 ""PARTS_BOOT" part 0 2;" \
72 ""PARTS_QBOOT" part 0 3;" \
73 ""PARTS_CSC" part 0 4;" \
74 ""PARTS_ROOT" part 0 5;" \
75 ""PARTS_DATA" part 0 6;" \
76 ""PARTS_UMS" part 0 7;" \
77 "params.bin raw 0x38 0x8;" \
78 "/Image.itb ext4 0 2\0"
79
80#define CONFIG_EXTRA_ENV_SETTINGS \
81 "bootk=" \
82 "run loaduimage;" \
83 "if run loaddtb; then " \
84 "bootm 0x40007FC0 - ${fdtaddr};" \
85 "fi;" \
86 "bootm 0x40007FC0;\0" \
87 "updatebackup=" \
88 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
89 "mmc dev 0 0\0" \
90 "updatebootb=" \
91 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
92 "lpj=lpj=3981312\0" \
93 "nfsboot=" \
94 "setenv bootargs root=/dev/nfs rw " \
95 "nfsroot=${nfsroot},nolock,tcp " \
96 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
97 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
98 "; run bootk\0" \
99 "ramfsboot=" \
100 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
101 "${console} ${meminfo} " \
102 "initrd=0x43000000,8M ramdisk=8192\0" \
103 "mmcboot=" \
104 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
105 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
106 "run bootk\0" \
107 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
108 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
109 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
110 "verify=n\0" \
111 "rootfstype=ext4\0" \
112 "console=console=ttySAC2,115200n8\0" \
113 "meminfo=crashkernel=32M@0x50000000\0" \
114 "nfsroot=/nfsroot/arm\0" \
115 "bootblock=" CONFIG_BOOTBLOCK "\0" \
116 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
117 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
118 "${fdtfile}\0" \
119 "mmcdev=0\0" \
120 "mmcbootpart=2\0" \
121 "mmcrootpart=5\0" \
122 "opts=always_resume=1\0" \
123 "partitions=" PARTS_DEFAULT \
124 "dfu_alt_info=" CONFIG_DFU_ALT \
125 "spladdr=0x40000100\0" \
126 "splsize=0x200\0" \
127 "splfile=falcon.bin\0" \
128 "spl_export=" \
129 "setexpr spl_imgsize ${splsize} + 8 ;" \
130 "setenv spl_imgsize 0x${spl_imgsize};" \
131 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
132 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
133 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
134 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
135 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
136 "spl export atags 0x40007FC0;" \
137 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
138 "mw.l ${spl_addr_tmp} ${splsize};" \
139 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
140 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
141 "setenv spl_imgsize;" \
142 "setenv spl_imgaddr;" \
143 "setenv spl_addr_tmp;\0" \
144 CONFIG_EXTRA_ENV_ITB \
145 "fdtaddr=40800000\0" \
146
147
148#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
149
150
151
152
153#define CONFIG_EXYNOS_ACE_SHA
154
155
156#define CONFIG_MISC_COMMON
157
158
159#define CONFIG_LCD_MENU
160
161
162#ifndef __ASSEMBLY__
163
164#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
165#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
166#define KEY_PWR_STATUS_MASK (1 << 0)
167#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
168#define KEY_PWR_INTERRUPT_MASK (1 << 0)
169
170#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
171#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
172#endif
173
174
175#define LCD_BPP LCD_COLOR16
176
177
178#define CONFIG_FB_ADDR 0x52504000
179#define CONFIG_EXYNOS_MIPI_DSIM
180#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
181
182#endif
183
