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2
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5
6#include <common.h>
7#include <init.h>
8#include <asm/io.h>
9#include <asm/addrspace.h>
10#include <asm/types.h>
11#include <linux/bitops.h>
12#include <linux/delay.h>
13#include <mach/ath79.h>
14#include <mach/ar71xx_regs.h>
15#include <mach/ddr.h>
16#include <debug_uart.h>
17
18#ifdef CONFIG_USB_HOST
19static void wdr4300_usb_start(void)
20{
21 void __iomem *gpio_regs = map_physmem(AR71XX_GPIO_BASE,
22 AR71XX_GPIO_SIZE, MAP_NOCACHE);
23 if (!gpio_regs)
24 return;
25
26
27 clrbits_be32(gpio_regs + AR71XX_GPIO_REG_OE, BIT(21) | BIT(22));
28 writel(BIT(21) | BIT(22), gpio_regs + AR71XX_GPIO_REG_SET);
29 mdelay(1);
30
31 ath79_usb_reset();
32}
33#else
34static inline void wdr4300_usb_start(void) {}
35#endif
36
37void wdr4300_pinmux_config(void)
38{
39 void __iomem *regs;
40
41 regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE,
42 MAP_NOCACHE);
43
44
45 writel(0x40, regs + AR934X_GPIO_REG_FUNC);
46
47
48 writel(0x3031b, regs + AR71XX_GPIO_REG_OE);
49 writel(0x0f804, regs + AR71XX_GPIO_REG_OUT);
50
51
52 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC0);
53 writel(0x0b0a0980, regs + AR934X_GPIO_REG_OUT_FUNC1);
54 writel(0x00180000, regs + AR934X_GPIO_REG_OUT_FUNC2);
55 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC3);
56 writel(0x0000004d, regs + AR934X_GPIO_REG_OUT_FUNC4);
57 writel(0x00000000, regs + AR934X_GPIO_REG_OUT_FUNC5);
58}
59
60#ifdef CONFIG_DEBUG_UART_BOARD_INIT
61void board_debug_uart_init(void)
62{
63 wdr4300_pinmux_config();
64}
65#endif
66
67#ifdef CONFIG_BOARD_EARLY_INIT_F
68int board_early_init_f(void)
69{
70#ifndef CONFIG_DEBUG_UART_BOARD_INIT
71 wdr4300_pinmux_config();
72#endif
73
74#ifndef CONFIG_SKIP_LOWLEVEL_INIT
75 ar934x_pll_init(560, 480, 240);
76 ar934x_ddr_init(560, 480, 240);
77#endif
78
79 wdr4300_usb_start();
80 ath79_eth_reset();
81
82 return 0;
83}
84#endif
85