LXR uboot/drivers/net/ftmac100.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Faraday FTMAC100 Ethernet
   4 *
   5 * (C) Copyright 2009 Faraday Technology
   6 * Po-Yu Chuang <ratbert@faraday-tech.com>
   7 */
   8
   9#ifndef __FTMAC100_H
  10#define __FTMAC100_H
  11
  12struct ftmac100 {
  13        unsigned int    isr;            /* 0x00 */
  14        unsigned int    imr;            /* 0x04 */
  15        unsigned int    mac_madr;       /* 0x08 */
  16        unsigned int    mac_ladr;       /* 0x0c */
  17        unsigned int    maht0;          /* 0x10 */
  18        unsigned int    maht1;          /* 0x14 */
  19        unsigned int    txpd;           /* 0x18 */
  20        unsigned int    rxpd;           /* 0x1c */
  21        unsigned int    txr_badr;       /* 0x20 */
  22        unsigned int    rxr_badr;       /* 0x24 */
  23        unsigned int    itc;            /* 0x28 */
  24        unsigned int    aptc;           /* 0x2c */
  25        unsigned int    dblac;          /* 0x30 */
  26        unsigned int    pad1[3];        /* 0x34 - 0x3c */
  27        unsigned int    pad2[16];       /* 0x40 - 0x7c */
  28        unsigned int    pad3[2];        /* 0x80 - 0x84 */
  29        unsigned int    maccr;          /* 0x88 */
  30        unsigned int    macsr;          /* 0x8c */
  31        unsigned int    phycr;          /* 0x90 */
  32        unsigned int    phywdata;       /* 0x94 */
  33        unsigned int    fcr;            /* 0x98 */
  34        unsigned int    bpr;            /* 0x9c */
  35        unsigned int    pad4[8];        /* 0xa0 - 0xbc */
  36        unsigned int    pad5;           /* 0xc0 */
  37        unsigned int    ts;             /* 0xc4 */
  38        unsigned int    dmafifos;       /* 0xc8 */
  39        unsigned int    tm;             /* 0xcc */
  40        unsigned int    pad6;           /* 0xd0 */
  41        unsigned int    tx_mcol_scol;   /* 0xd4 */
  42        unsigned int    rpf_aep;        /* 0xd8 */
  43        unsigned int    xm_pg;          /* 0xdc */
  44        unsigned int    runt_tlcc;      /* 0xe0 */
  45        unsigned int    crcer_ftl;      /* 0xe4 */
  46        unsigned int    rlc_rcc;        /* 0xe8 */
  47        unsigned int    broc;           /* 0xec */
  48        unsigned int    mulca;          /* 0xf0 */
  49        unsigned int    rp;             /* 0xf4 */
  50        unsigned int    xp;             /* 0xf8 */
  51};
  52
  53/*
  54 * Interrupt status register & interrupt mask register
  55 */
  56#define FTMAC100_INT_RPKT_FINISH        (1 << 0)
  57#define FTMAC100_INT_NORXBUF            (1 << 1)
  58#define FTMAC100_INT_XPKT_FINISH        (1 << 2)
  59#define FTMAC100_INT_NOTXBUF            (1 << 3)
  60#define FTMAC100_INT_XPKT_OK            (1 << 4)
  61#define FTMAC100_INT_XPKT_LOST          (1 << 5)
  62#define FTMAC100_INT_RPKT_SAV           (1 << 6)
  63#define FTMAC100_INT_RPKT_LOST          (1 << 7)
  64#define FTMAC100_INT_AHB_ERR            (1 << 8)
  65#define FTMAC100_INT_PHYSTS_CHG         (1 << 9)
  66
  67/*
  68 * Automatic polling timer control register
  69 */
  70#define FTMAC100_APTC_RXPOLL_CNT(x)     (((x) & 0xf) << 0)
  71#define FTMAC100_APTC_RXPOLL_TIME_SEL   (1 << 4)
  72#define FTMAC100_APTC_TXPOLL_CNT(x)     (((x) & 0xf) << 8)
  73#define FTMAC100_APTC_TXPOLL_TIME_SEL   (1 << 12)
  74
  75/*
  76 * MAC control register
  77 */
  78#define FTMAC100_MACCR_XDMA_EN          (1 << 0)
  79#define FTMAC100_MACCR_RDMA_EN          (1 << 1)
  80#define FTMAC100_MACCR_SW_RST           (1 << 2)
  81#define FTMAC100_MACCR_LOOP_EN          (1 << 3)
  82#define FTMAC100_MACCR_CRC_DIS          (1 << 4)
  83#define FTMAC100_MACCR_XMT_EN           (1 << 5)
  84#define FTMAC100_MACCR_ENRX_IN_HALFTX   (1 << 6)
  85#define FTMAC100_MACCR_RCV_EN           (1 << 8)
  86#define FTMAC100_MACCR_HT_MULTI_EN      (1 << 9)
  87#define FTMAC100_MACCR_RX_RUNT          (1 << 10)
  88#define FTMAC100_MACCR_RX_FTL           (1 << 11)
  89#define FTMAC100_MACCR_RCV_ALL          (1 << 12)
  90#define FTMAC100_MACCR_CRC_APD          (1 << 14)
  91#define FTMAC100_MACCR_FULLDUP          (1 << 15)
  92#define FTMAC100_MACCR_RX_MULTIPKT      (1 << 16)
  93#define FTMAC100_MACCR_RX_BROADPKT      (1 << 17)
  94
  95/*
  96 * Transmit descriptor, aligned to 16 bytes
  97 */
  98struct ftmac100_txdes {
  99        unsigned int    txdes0;
 100        unsigned int    txdes1;
 101        unsigned int    txdes2; /* TXBUF_BADR */
 102        unsigned int    txdes3; /* not used by HW */
 103} __attribute__ ((aligned(16)));
 104
 105#define FTMAC100_TXDES0_TXPKT_LATECOL   (1 << 0)
 106#define FTMAC100_TXDES0_TXPKT_EXSCOL    (1 << 1)
 107#define FTMAC100_TXDES0_TXDMA_OWN       (1 << 31)
 108
 109#define FTMAC100_TXDES1_TXBUF_SIZE(x)   ((x) & 0x7ff)
 110#define FTMAC100_TXDES1_LTS             (1 << 27)
 111#define FTMAC100_TXDES1_FTS             (1 << 28)
 112#define FTMAC100_TXDES1_TX2FIC          (1 << 29)
 113#define FTMAC100_TXDES1_TXIC            (1 << 30)
 114#define FTMAC100_TXDES1_EDOTR           (1 << 31)
 115
 116/*
 117 * Receive descriptor, aligned to 16 bytes
 118 */
 119struct ftmac100_rxdes {
 120        unsigned int    rxdes0;
 121        unsigned int    rxdes1;
 122        unsigned int    rxdes2; /* RXBUF_BADR */
 123        unsigned int    rxdes3; /* not used by HW */
 124} __attribute__ ((aligned(16)));
 125
 126#define FTMAC100_RXDES0_RFL(des)        ((des) & 0x7ff)
 127#define FTMAC100_RXDES0_MULTICAST       (1 << 16)
 128#define FTMAC100_RXDES0_BROADCAST       (1 << 17)
 129#define FTMAC100_RXDES0_RX_ERR          (1 << 18)
 130#define FTMAC100_RXDES0_CRC_ERR         (1 << 19)
 131#define FTMAC100_RXDES0_FTL             (1 << 20)
 132#define FTMAC100_RXDES0_RUNT            (1 << 21)
 133#define FTMAC100_RXDES0_RX_ODD_NB       (1 << 22)
 134#define FTMAC100_RXDES0_LRS             (1 << 28)
 135#define FTMAC100_RXDES0_FRS             (1 << 29)
 136#define FTMAC100_RXDES0_RXDMA_OWN       (1 << 31)
 137
 138#define FTMAC100_RXDES1_RXBUF_SIZE(x)   ((x) & 0x7ff)
 139#define FTMAC100_RXDES1_EDORR           (1 << 31)
 140
 141#endif  /* __FTMAC100_H */
 142