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7#include <log.h>
8#include <asm/gpio.h>
9#include <common.h>
10#include <dm.h>
11#include <dm/pinctrl.h>
12#include <linux/io.h>
13#include "pinctrl-meson-axg.h"
14
15static int meson_axg_pmx_get_bank(struct udevice *dev, unsigned int pin,
16 struct meson_pmx_bank **bank)
17{
18 int i;
19 struct meson_pinctrl *priv = dev_get_priv(dev);
20 struct meson_axg_pmx_data *pmx = priv->data->pmx_data;
21
22 for (i = 0; i < pmx->num_pmx_banks; i++)
23 if (pin >= pmx->pmx_banks[i].first &&
24 pin <= pmx->pmx_banks[i].last) {
25 *bank = &pmx->pmx_banks[i];
26 return 0;
27 }
28
29 return -EINVAL;
30}
31
32static int meson_axg_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
33 unsigned int pin,
34 unsigned int *reg,
35 unsigned int *offset)
36{
37 int shift;
38
39 shift = pin - bank->first;
40
41 *reg = bank->reg + (bank->offset + (shift << 2)) / 32;
42 *offset = (bank->offset + (shift << 2)) % 32;
43
44 return 0;
45}
46
47static int meson_axg_pmx_update_function(struct udevice *dev,
48 unsigned int pin, unsigned int func)
49{
50 struct meson_pinctrl *priv = dev_get_priv(dev);
51 struct meson_pmx_bank *bank;
52 unsigned int offset;
53 unsigned int reg;
54 unsigned int tmp;
55 int ret;
56
57 ret = meson_axg_pmx_get_bank(dev, pin, &bank);
58 if (ret)
59 return ret;
60
61 meson_axg_pmx_calc_reg_and_offset(bank, pin, ®, &offset);
62
63 tmp = readl(priv->reg_mux + (reg << 2));
64 tmp &= ~(0xf << offset);
65 tmp |= (func & 0xf) << offset;
66 writel(tmp, priv->reg_mux + (reg << 2));
67
68 return ret;
69}
70
71static int meson_axg_pinmux_group_set(struct udevice *dev,
72 unsigned int group_selector,
73 unsigned int func_selector)
74{
75 struct meson_pinctrl *priv = dev_get_priv(dev);
76 const struct meson_pmx_group *group;
77 const struct meson_pmx_func *func;
78 struct meson_pmx_axg_data *pmx_data;
79 int i, ret;
80
81 group = &priv->data->groups[group_selector];
82 pmx_data = (struct meson_pmx_axg_data *)group->data;
83 func = &priv->data->funcs[func_selector];
84
85 debug("pinmux: set group %s func %s\n", group->name, func->name);
86
87 for (i = 0; i < group->num_pins; i++) {
88 ret = meson_axg_pmx_update_function(dev, group->pins[i],
89 pmx_data->func);
90 if (ret)
91 return ret;
92 }
93
94 return 0;
95}
96
97static int meson_axg_pinmux_get(struct udevice *dev, unsigned int selector,
98 char *buf, int size)
99{
100 struct meson_pinctrl *priv = dev_get_priv(dev);
101 struct meson_pmx_axg_data *pmx_data;
102 struct meson_pmx_group *group;
103 struct meson_pmx_bank *bank;
104 unsigned int offset;
105 unsigned int func;
106 unsigned int reg;
107 int ret, i, j;
108
109 selector += priv->data->pin_base;
110
111 ret = meson_axg_pmx_get_bank(dev, selector, &bank);
112 if (ret) {
113 snprintf(buf, size, "Unhandled");
114 return 0;
115 }
116
117 meson_axg_pmx_calc_reg_and_offset(bank, selector, ®, &offset);
118
119 func = (readl(priv->reg_mux + (reg << 2)) >> offset) & 0xf;
120
121 for (i = 0; i < priv->data->num_groups; i++) {
122 group = &priv->data->groups[i];
123 pmx_data = (struct meson_pmx_axg_data *)group->data;
124
125 if (pmx_data->func != func)
126 continue;
127
128 for (j = 0; j < group->num_pins; j++) {
129 if (group->pins[j] == selector) {
130 snprintf(buf, size, "%s (%x)",
131 group->name, func);
132 return 0;
133 }
134 }
135 }
136
137 snprintf(buf, size, "Unknown (%x)", func);
138
139 return 0;
140}
141
142const struct pinconf_param meson_axg_pinconf_params[] = {
143 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
144 { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
145 { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
146 { "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 },
147};
148
149const struct pinctrl_ops meson_axg_pinctrl_ops = {
150 .get_groups_count = meson_pinctrl_get_groups_count,
151 .get_group_name = meson_pinctrl_get_group_name,
152 .get_functions_count = meson_pinmux_get_functions_count,
153 .get_function_name = meson_pinmux_get_function_name,
154 .pinmux_group_set = meson_axg_pinmux_group_set,
155 .set_state = pinctrl_generic_set_state,
156 .pinconf_params = meson_axg_pinconf_params,
157 .pinconf_num_params = ARRAY_SIZE(meson_axg_pinconf_params),
158 .pinconf_set = meson_pinconf_set,
159 .pinconf_group_set = meson_pinconf_group_set,
160 .get_pin_name = meson_pinctrl_get_pin_name,
161 .get_pins_count = meson_pinctrl_get_pins_count,
162 .get_pin_muxing = meson_axg_pinmux_get,
163};
164
165static int meson_axg_gpio_request(struct udevice *dev,
166 unsigned int offset, const char *label)
167{
168 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
169
170 return meson_axg_pmx_update_function(dev->parent,
171 offset + priv->data->pin_base, 0);
172}
173
174static const struct dm_gpio_ops meson_axg_gpio_ops = {
175 .request = meson_axg_gpio_request,
176 .set_value = meson_gpio_set,
177 .get_value = meson_gpio_get,
178 .get_function = meson_gpio_get_direction,
179 .direction_input = meson_gpio_direction_input,
180 .direction_output = meson_gpio_direction_output,
181};
182
183const struct driver meson_axg_gpio_driver = {
184 .name = "meson-axg-gpio",
185 .id = UCLASS_GPIO,
186 .probe = meson_gpio_probe,
187 .ops = &meson_axg_gpio_ops,
188};
189
