LXR uboot/include/configs/kmcoge5ne.h

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * (C) Copyright 2012
   4 * Holger Brunck, Keymile GmbH Hannover, <holger.brunck@keymile.com>
   5 * Christian Herzig, Keymile AG Switzerland, <christian.herzig@keymile.com>
   6 */
   7
   8#ifndef __CONFIG_H
   9#define __CONFIG_H
  10
  11#define CONFIG_HOSTNAME         "kmcoge5ne"
  12#define CONFIG_NAND_ECC_BCH
  13#define CONFIG_NAND_KMETER1
  14#define CONFIG_SYS_MAX_NAND_DEVICE              1
  15#define NAND_MAX_CHIPS                          1
  16#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
  17
  18#define CONFIG_KM_UBI_PARTITION_NAME_BOOT       "ubi0"
  19#define CONFIG_KM_UBI_PARTITION_NAME_APP        "ubi1"
  20
  21/* include common defines/options for all Keymile boards */
  22#include "km/keymile-common.h"
  23#include "km/km-powerpc.h"
  24#include "km/km-mpc83xx.h"
  25#include "km/km-mpc8360.h"
  26
  27/*
  28 * System Clock Setup
  29 */
  30#define CONFIG_83XX_CLKIN               66000000
  31#define CONFIG_SYS_CLK_FREQ             66000000
  32#define CONFIG_83XX_PCICLK              66000000
  33
  34/**
  35 * KMCOGE5NE has 512 MB RAM
  36 */
  37#define CONFIG_SYS_DDR_CS0_CONFIG (\
  38        CSCONFIG_EN | \
  39        CSCONFIG_AP | \
  40        CSCONFIG_ODT_WR_ONLY_CURRENT | \
  41        CSCONFIG_BANK_BIT_3 | \
  42        CSCONFIG_ROW_BIT_13 | \
  43        CSCONFIG_COL_BIT_10)
  44
  45/*
  46 * BFTIC3 on the local bus CS4
  47 */
  48#define CONFIG_SYS_BFTIC3_BASE                  0xB0000000
  49#define CONFIG_SYS_BFTIC3_SIZE                  256
  50
  51/* enable POST tests */
  52#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
  53#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
  54#define CPM_POST_WORD_ADDR  CONFIG_SYS_MEMTEST_END
  55#define CONFIG_TESTPIN_REG  gprt3       /* for kmcoge5ne */
  56#define CONFIG_TESTPIN_MASK 0x20        /* for kmcoge5ne */
  57
  58#endif /* CONFIG */
  59