1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (C) 2015 Stefan Roese <sr@denx.de> 4 */ 5#ifndef __CONFIG_SOCFPGA_SR1500_H__ 6#define __CONFIG_SOCFPGA_SR1500_H__ 7 8#include <asm/arch/base_addr_ac5.h> 9 10/* Memory configurations */ 11#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */ 12 13/* Booting Linux */ 14#define CONFIG_LOADADDR 0x01000000 15#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 16 17/* Ethernet on SoC (EMAC) */ 18#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII 19/* The PHY is autodetected, so no MII PHY address is needed here */ 20#define PHY_ANEG_TIMEOUT 8000 21 22/* Enable SPI NOR flash reset, needed for SPI booting */ 23#define CONFIG_SPI_N25Q256A_RESET 24 25/* 26 * Bootcounter 27 */ 28#define CONFIG_SYS_BOOTCOUNT_BE 29 30/* Environment setting for SPI flash */ 31 32/* The rest of the configuration is shared */ 33#include <configs/socfpga_common.h> 34 35#endif /* __CONFIG_SOCFPGA_SR1500_H__ */ 36