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6#ifndef _SCMI_PROTOCOLS_H
7#define _SCMI_PROTOCOLS_H
8
9#include <linux/bitops.h>
10#include <asm/types.h>
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18enum scmi_std_protocol {
19 SCMI_PROTOCOL_ID_BASE = 0x10,
20 SCMI_PROTOCOL_ID_POWER_DOMAIN = 0x11,
21 SCMI_PROTOCOL_ID_SYSTEM = 0x12,
22 SCMI_PROTOCOL_ID_PERF = 0x13,
23 SCMI_PROTOCOL_ID_CLOCK = 0x14,
24 SCMI_PROTOCOL_ID_SENSOR = 0x15,
25 SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
26 SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN = 0x17,
27};
28
29enum scmi_status_code {
30 SCMI_SUCCESS = 0,
31 SCMI_NOT_SUPPORTED = -1,
32 SCMI_INVALID_PARAMETERS = -2,
33 SCMI_DENIED = -3,
34 SCMI_NOT_FOUND = -4,
35 SCMI_OUT_OF_RANGE = -5,
36 SCMI_BUSY = -6,
37 SCMI_COMMS_ERROR = -7,
38 SCMI_GENERIC_ERROR = -8,
39 SCMI_HARDWARE_ERROR = -9,
40 SCMI_PROTOCOL_ERROR = -10,
41};
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47enum scmi_clock_message_id {
48 SCMI_CLOCK_RATE_SET = 0x5,
49 SCMI_CLOCK_RATE_GET = 0x6,
50 SCMI_CLOCK_CONFIG_SET = 0x7,
51};
52
53#define SCMI_CLK_RATE_ASYNC_NOTIFY BIT(0)
54#define SCMI_CLK_RATE_ASYNC_NORESP (BIT(0) | BIT(1))
55#define SCMI_CLK_RATE_ROUND_DOWN 0
56#define SCMI_CLK_RATE_ROUND_UP BIT(2)
57#define SCMI_CLK_RATE_ROUND_CLOSEST BIT(3)
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64struct scmi_clk_state_in {
65 u32 clock_id;
66 u32 attributes;
67};
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73struct scmi_clk_state_out {
74 s32 status;
75};
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82struct scmi_clk_rate_get_in {
83 u32 clock_id;
84};
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92struct scmi_clk_rate_get_out {
93 s32 status;
94 u32 rate_lsb;
95 u32 rate_msb;
96};
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105struct scmi_clk_rate_set_in {
106 u32 clock_id;
107 u32 flags;
108 u32 rate_lsb;
109 u32 rate_msb;
110};
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116struct scmi_clk_rate_set_out {
117 s32 status;
118};
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124enum scmi_reset_domain_message_id {
125 SCMI_RESET_DOMAIN_ATTRIBUTES = 0x3,
126 SCMI_RESET_DOMAIN_RESET = 0x4,
127};
128
129#define SCMI_RD_NAME_LEN 16
130
131#define SCMI_RD_ATTRIBUTES_FLAG_ASYNC BIT(31)
132#define SCMI_RD_ATTRIBUTES_FLAG_NOTIF BIT(30)
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134#define SCMI_RD_RESET_FLAG_ASYNC BIT(2)
135#define SCMI_RD_RESET_FLAG_ASSERT BIT(1)
136#define SCMI_RD_RESET_FLAG_CYCLE BIT(0)
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142struct scmi_rd_attr_in {
143 u32 domain_id;
144};
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153struct scmi_rd_attr_out {
154 s32 status;
155 u32 attributes;
156 u32 latency;
157 char name[SCMI_RD_NAME_LEN];
158};
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166struct scmi_rd_reset_in {
167 u32 domain_id;
168 u32 flags;
169 u32 reset_state;
170};
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176struct scmi_rd_reset_out {
177 s32 status;
178};
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184enum scmi_voltage_domain_message_id {
185 SCMI_VOLTAGE_DOMAIN_ATTRIBUTES = 0x3,
186 SCMI_VOLTAGE_DOMAIN_CONFIG_SET = 0x5,
187 SCMI_VOLTAGE_DOMAIN_CONFIG_GET = 0x6,
188 SCMI_VOLTAGE_DOMAIN_LEVEL_SET = 0x7,
189 SCMI_VOLTAGE_DOMAIN_LEVEL_GET = 0x8,
190};
191
192#define SCMI_VOLTD_NAME_LEN 16
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194#define SCMI_VOLTD_CONFIG_MASK GENMASK(3, 0)
195#define SCMI_VOLTD_CONFIG_OFF 0
196#define SCMI_VOLTD_CONFIG_ON 0x7
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202struct scmi_voltd_attr_in {
203 u32 domain_id;
204};
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212struct scmi_voltd_attr_out {
213 s32 status;
214 u32 attributes;
215 char name[SCMI_VOLTD_NAME_LEN];
216};
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223struct scmi_voltd_config_set_in {
224 u32 domain_id;
225 u32 config;
226};
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232struct scmi_voltd_config_set_out {
233 s32 status;
234};
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240struct scmi_voltd_config_get_in {
241 u32 domain_id;
242};
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249struct scmi_voltd_config_get_out {
250 s32 status;
251 u32 config;
252};
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260struct scmi_voltd_level_set_in {
261 u32 domain_id;
262 u32 flags;
263 s32 voltage_level;
264};
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270struct scmi_voltd_level_set_out {
271 s32 status;
272};
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278struct scmi_voltd_level_get_in {
279 u32 domain_id;
280};
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287struct scmi_voltd_level_get_out {
288 s32 status;
289 s32 voltage_level;
290};
291
292#endif
293