LXR uboot/board/freescale/mx6ullevk/mx6ullevk.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <init.h>
   7#include <asm/arch/clock.h>
   8#include <asm/arch/iomux.h>
   9#include <asm/arch/imx-regs.h>
  10#include <asm/arch/crm_regs.h>
  11#include <asm/arch/mx6-pins.h>
  12#include <asm/arch/sys_proto.h>
  13#include <asm/global_data.h>
  14#include <asm/gpio.h>
  15#include <asm/mach-imx/iomux-v3.h>
  16#include <asm/mach-imx/boot_mode.h>
  17#include <asm/io.h>
  18#include <common.h>
  19#include <env.h>
  20#include <fsl_esdhc_imx.h>
  21#include <linux/sizes.h>
  22#include <mmc.h>
  23#include <miiphy.h>
  24
  25DECLARE_GLOBAL_DATA_PTR;
  26
  27#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |             \
  28        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
  29        PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  30
  31int dram_init(void)
  32{
  33        gd->ram_size = imx_ddr_size();
  34
  35        return 0;
  36}
  37
  38static iomux_v3_cfg_t const uart1_pads[] = {
  39        MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  40        MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  41};
  42
  43static void setup_iomux_uart(void)
  44{
  45        imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  46}
  47
  48int board_mmc_get_env_dev(int devno)
  49{
  50        return devno;
  51}
  52
  53int mmc_map_to_kernel_blk(int devno)
  54{
  55        return devno;
  56}
  57
  58int board_early_init_f(void)
  59{
  60        setup_iomux_uart();
  61
  62        return 0;
  63}
  64
  65#ifdef CONFIG_FEC_MXC
  66static int setup_fec(int fec_id)
  67{
  68        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  69        int ret;
  70
  71        if (fec_id == 0) {
  72                /*
  73                 * Use 50MHz anatop loopback REF_CLK1 for ENET1,
  74                 * clear gpr1[13], set gpr1[17].
  75                 */
  76                clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
  77                                IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
  78        } else {
  79                /*
  80                 * Use 50MHz anatop loopback REF_CLK2 for ENET2,
  81                 * clear gpr1[14], set gpr1[18].
  82                 */
  83                clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
  84                                IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
  85        }
  86
  87        ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ);
  88        if (ret)
  89                return ret;
  90
  91        enable_enet_clk(1);
  92
  93        return 0;
  94}
  95
  96int board_phy_config(struct phy_device *phydev)
  97{
  98        phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
  99
 100        if (phydev->drv->config)
 101                phydev->drv->config(phydev);
 102
 103        return 0;
 104}
 105#endif
 106
 107int board_init(void)
 108{
 109        /* Address of boot parameters */
 110        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 111
 112#ifdef  CONFIG_FEC_MXC
 113        setup_fec(CONFIG_FEC_ENET_DEV);
 114#endif
 115
 116        return 0;
 117}
 118
 119#ifdef CONFIG_CMD_BMODE
 120static const struct boot_mode board_boot_modes[] = {
 121        /* 4 bit bus width */
 122        {"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)},
 123        {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
 124        {"qspi1", MAKE_CFGVAL(0x10, 0x00, 0x00, 0x00)},
 125        {NULL,   0},
 126};
 127#endif
 128
 129int board_late_init(void)
 130{
 131#ifdef CONFIG_CMD_BMODE
 132        add_board_boot_modes(board_boot_modes);
 133#endif
 134
 135#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 136        if (is_cpu_type(MXC_CPU_MX6ULZ))
 137                env_set("board_name", "ULZ-EVK");
 138        else
 139                env_set("board_name", "EVK");
 140        env_set("board_rev", "14X14");
 141#endif
 142
 143        return 0;
 144}
 145
 146int checkboard(void)
 147{
 148        if (is_cpu_type(MXC_CPU_MX6ULZ))
 149                puts("Board: MX6ULZ 14x14 EVK\n");
 150        else
 151                puts("Board: MX6ULL 14x14 EVK\n");
 152
 153        return 0;
 154}
 155