uboot/arch/arm/cpu/armv7/ls102xa/timer.c
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   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright 2014 Freescale Semiconductor, Inc.
   4 */
   5
   6#include <common.h>
   7#include <init.h>
   8#include <time.h>
   9#include <asm/global_data.h>
  10#include <asm/io.h>
  11#include <div64.h>
  12#include <asm/arch/immap_ls102xa.h>
  13#include <asm/arch/clock.h>
  14#include <linux/delay.h>
  15
  16DECLARE_GLOBAL_DATA_PTR;
  17
  18/*
  19 * This function is intended for SHORT delays only.
  20 * It will overflow at around 10 seconds @ 400MHz,
  21 * or 20 seconds @ 200MHz.
  22 */
  23unsigned long usec2ticks(unsigned long usec)
  24{
  25        ulong ticks;
  26
  27        if (usec < 1000)
  28                ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  29        else
  30                ticks = ((usec / 10) * (get_tbclk() / 100000));
  31
  32        return ticks;
  33}
  34
  35static inline unsigned long long tick_to_time(unsigned long long tick)
  36{
  37        unsigned long freq;
  38
  39        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  40
  41        tick *= CONFIG_SYS_HZ;
  42        do_div(tick, freq);
  43
  44        return tick;
  45}
  46
  47static inline unsigned long long us_to_tick(unsigned long long usec)
  48{
  49        unsigned long freq;
  50
  51        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  52
  53        usec = usec * freq  + 999999;
  54        do_div(usec, 1000000);
  55
  56        return usec;
  57}
  58
  59int timer_init(void)
  60{
  61        struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
  62        unsigned long ctrl, freq;
  63        unsigned long long val;
  64
  65        /* Enable System Counter */
  66        writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
  67
  68        freq = COUNTER_FREQUENCY;
  69        asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
  70
  71        /* Set PL1 Physical Timer Ctrl */
  72        ctrl = ARCH_TIMER_CTRL_ENABLE;
  73        asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
  74
  75        /* Set PL1 Physical Comp Value */
  76        val = TIMER_COMP_VAL;
  77        asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
  78
  79        gd->arch.tbl = 0;
  80        gd->arch.tbu = 0;
  81
  82        return 0;
  83}
  84
  85unsigned long long get_ticks(void)
  86{
  87        unsigned long long now;
  88
  89        asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
  90
  91        gd->arch.tbl = (unsigned long)(now & 0xffffffff);
  92        gd->arch.tbu = (unsigned long)(now >> 32);
  93
  94        return now;
  95}
  96
  97unsigned long get_timer(ulong base)
  98{
  99        return tick_to_time(get_ticks()) - base;
 100}
 101
 102/* delay x useconds and preserve advance timstamp value */
 103void __udelay(unsigned long usec)
 104{
 105        unsigned long long start;
 106        unsigned long tmo;
 107
 108        start = get_ticks();                    /* get current timestamp */
 109        tmo = us_to_tick(usec);                 /* convert usecs to ticks */
 110
 111        while ((get_ticks() - start) < tmo)
 112                ;                               /* loop till time has passed */
 113}
 114
 115/*
 116 * This function is derived from PowerPC code (timebase clock frequency).
 117 * On ARM it returns the number of timer ticks per second.
 118 */
 119unsigned long get_tbclk(void)
 120{
 121        unsigned long freq;
 122
 123        asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
 124
 125        return freq;
 126}
 127