1
2
3
4
5
6
7#ifndef __I2S_REGS_H__
8#define __I2S_REGS_H__
9
10#define CON_RESET (1 << 31)
11#define CON_TXFIFO_FULL (1 << 8)
12#define CON_TXCH_PAUSE (1 << 4)
13#define CON_ACTIVE (1 << 0)
14
15#define MOD_OP_CLK (3 << 30)
16#define MOD_BLCP_SHIFT 24
17#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
18#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
19#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
20#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
21
22#define MOD_BLC_16BIT (0 << 13)
23#define MOD_BLC_8BIT (1 << 13)
24#define MOD_BLC_24BIT (2 << 13)
25#define MOD_BLC_MASK (3 << 13)
26
27#define MOD_SLAVE (1 << 11)
28#define MOD_RCLKSRC (0 << 10)
29#define MOD_MASK (3 << 8)
30#define MOD_LR_LLOW (0 << 7)
31#define MOD_LR_RLOW (1 << 7)
32#define MOD_SDF_IIS (0 << 5)
33#define MOD_SDF_MSB (1 << 5)
34#define MOD_SDF_LSB (2 << 5)
35#define MOD_SDF_MASK (3 << 5)
36#define MOD_RCLK_256FS (0 << 3)
37#define MOD_RCLK_512FS (1 << 3)
38#define MOD_RCLK_384FS (2 << 3)
39#define MOD_RCLK_768FS (3 << 3)
40#define MOD_RCLK_MASK (3 << 3)
41#define MOD_BCLK_32FS (0 << 1)
42#define MOD_BCLK_48FS (1 << 1)
43#define MOD_BCLK_16FS (2 << 1)
44#define MOD_BCLK_24FS (3 << 1)
45#define MOD_BCLK_MASK (3 << 1)
46
47#define MOD_CDCLKCON (1 << 12)
48
49#define FIC_TXFLUSH (1 << 15)
50#define FIC_RXFLUSH (1 << 7)
51
52#define PSREN (1 << 15)
53#define PSVAL (3 << 8)
54
55#endif
56