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7#include <common.h>
8#include <command.h>
9#include <cpu.h>
10#include <cpu_func.h>
11#include <dm.h>
12#include <errno.h>
13#include <init.h>
14#include <irq_func.h>
15#include <asm/cache.h>
16#include <asm/global_data.h>
17#include <asm/system.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21#ifdef CONFIG_DISPLAY_CPUINFO
22int print_cpuinfo(void)
23{
24 printf("CPU: Nios-II\n");
25 return 0;
26}
27#endif
28
29#ifdef CONFIG_ALTERA_SYSID
30int checkboard(void)
31{
32 display_sysid();
33 return 0;
34}
35#endif
36
37int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
38{
39 disable_interrupts();
40
41 nios2_callr(gd->arch.reset_addr);
42 return 0;
43}
44
45
46
47
48
49
50
51#ifndef CONFIG_ROM_STUBS
52static void copy_exception_trampoline(void)
53{
54 extern int _except_start, _except_end;
55 void *except_target = (void *)gd->arch.exception_addr;
56
57 if (&_except_start != except_target) {
58 memcpy(except_target, &_except_start,
59 &_except_end - &_except_start);
60 flush_cache(gd->arch.exception_addr,
61 &_except_end - &_except_start);
62 }
63}
64#endif
65
66int arch_cpu_init_dm(void)
67{
68 struct udevice *dev;
69 int ret;
70
71 ret = uclass_first_device_err(UCLASS_CPU, &dev);
72 if (ret)
73 return ret;
74
75 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
76#ifndef CONFIG_ROM_STUBS
77 copy_exception_trampoline();
78#endif
79
80 return 0;
81}
82
83static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
84 int size)
85{
86 const char *cpu_name = "Nios-II";
87
88 if (size < strlen(cpu_name))
89 return -ENOSPC;
90 strcpy(buf, cpu_name);
91
92 return 0;
93}
94
95static int altera_nios2_get_info(const struct udevice *dev,
96 struct cpu_info *info)
97{
98 info->cpu_freq = gd->cpu_clk;
99 info->features = (1 << CPU_FEAT_L1_CACHE) |
100 (gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
101
102 return 0;
103}
104
105static int altera_nios2_get_count(const struct udevice *dev)
106{
107 return 1;
108}
109
110static int altera_nios2_probe(struct udevice *dev)
111{
112 const void *blob = gd->fdt_blob;
113 int node = dev_of_offset(dev);
114
115 gd->cpu_clk = fdtdec_get_int(blob, node,
116 "clock-frequency", 0);
117 gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
118 "dcache-line-size", 0);
119 gd->arch.icache_line_size = fdtdec_get_int(blob, node,
120 "icache-line-size", 0);
121 gd->arch.dcache_size = fdtdec_get_int(blob, node,
122 "dcache-size", 0);
123 gd->arch.icache_size = fdtdec_get_int(blob, node,
124 "icache-size", 0);
125 gd->arch.reset_addr = fdtdec_get_int(blob, node,
126 "altr,reset-addr", 0);
127 gd->arch.exception_addr = fdtdec_get_int(blob, node,
128 "altr,exception-addr", 0);
129 gd->arch.has_initda = fdtdec_get_int(blob, node,
130 "altr,has-initda", 0);
131 gd->arch.has_mmu = fdtdec_get_int(blob, node,
132 "altr,has-mmu", 0);
133 gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000;
134 gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000;
135 gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff;
136
137 return 0;
138}
139
140static const struct cpu_ops altera_nios2_ops = {
141 .get_desc = altera_nios2_get_desc,
142 .get_info = altera_nios2_get_info,
143 .get_count = altera_nios2_get_count,
144};
145
146static const struct udevice_id altera_nios2_ids[] = {
147 { .compatible = "altr,nios2-1.0" },
148 { .compatible = "altr,nios2-1.1" },
149 { }
150};
151
152U_BOOT_DRIVER(altera_nios2) = {
153 .name = "altera_nios2",
154 .id = UCLASS_CPU,
155 .of_match = altera_nios2_ids,
156 .probe = altera_nios2_probe,
157 .ops = &altera_nios2_ops,
158 .flags = DM_FLAG_PRE_RELOC,
159};
160
161
162int dram_init(void)
163{
164 return 0;
165}
166