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6
7#include <common.h>
8#include <init.h>
9#include <net.h>
10#include <asm/arch/chilisom.h>
11#include <asm/arch/cpu.h>
12#include <asm/arch/hardware.h>
13#include <asm/arch/omap.h>
14#include <asm/arch/mem.h>
15#include <asm/arch/mmc_host_def.h>
16#include <asm/arch/mux.h>
17#include <asm/arch/sys_proto.h>
18#include <asm/emif.h>
19#include <asm/global_data.h>
20#include <asm/io.h>
21#include <cpsw.h>
22#include <env.h>
23#include <errno.h>
24#include <miiphy.h>
25#include <spl.h>
26#include <watchdog.h>
27
28DECLARE_GLOBAL_DATA_PTR;
29
30static __maybe_unused struct ctrl_dev *cdev =
31 (struct ctrl_dev *)CTRL_DEVICE_BASE;
32
33#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
34static struct module_pin_mux uart0_pin_mux[] = {
35 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
36 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
37 {-1},
38};
39
40static struct module_pin_mux mmc0_pin_mux[] = {
41 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},
42 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},
43 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},
44 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},
45 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},
46 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},
47 {-1},
48};
49
50static struct module_pin_mux rmii1_pin_mux[] = {
51 {OFFSET(mii1_crs), MODE(1) | RXACTIVE},
52 {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},
53 {OFFSET(mii1_txen), MODE(1)},
54 {OFFSET(mii1_txd1), MODE(1)},
55 {OFFSET(mii1_txd0), MODE(1)},
56 {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},
57 {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},
58 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},
59 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},
60 {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE},
61 {-1},
62};
63
64static void enable_board_pin_mux(void)
65{
66 chilisom_enable_pin_mux();
67
68
69 configure_module_pin_mux(rmii1_pin_mux);
70 configure_module_pin_mux(mmc0_pin_mux);
71}
72
73void set_uart_mux_conf(void)
74{
75 configure_module_pin_mux(uart0_pin_mux);
76}
77
78void set_mux_conf_regs(void)
79{
80 enable_board_pin_mux();
81}
82
83void am33xx_spl_board_init(void)
84{
85 chilisom_spl_board_init();
86}
87#endif
88
89
90
91
92int board_init(void)
93{
94#if defined(CONFIG_HW_WATCHDOG)
95 hw_watchdog_init();
96#endif
97
98 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
99 gpmc_init();
100
101 return 0;
102}
103
104#ifdef CONFIG_BOARD_LATE_INIT
105int board_late_init(void)
106{
107#if !defined(CONFIG_SPL_BUILD)
108 uint8_t mac_addr[6];
109 uint32_t mac_hi, mac_lo;
110
111
112 mac_lo = readl(&cdev->macid0l);
113 mac_hi = readl(&cdev->macid0h);
114 mac_addr[0] = mac_hi & 0xFF;
115 mac_addr[1] = (mac_hi & 0xFF00) >> 8;
116 mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
117 mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
118 mac_addr[4] = mac_lo & 0xFF;
119 mac_addr[5] = (mac_lo & 0xFF00) >> 8;
120
121 if (!env_get("ethaddr")) {
122 printf("<ethaddr> not set. Validating first E-fuse MAC\n");
123
124 if (is_valid_ethaddr(mac_addr))
125 eth_env_set_enetaddr("ethaddr", mac_addr);
126 }
127
128 mac_lo = readl(&cdev->macid1l);
129 mac_hi = readl(&cdev->macid1h);
130 mac_addr[0] = mac_hi & 0xFF;
131 mac_addr[1] = (mac_hi & 0xFF00) >> 8;
132 mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
133 mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
134 mac_addr[4] = mac_lo & 0xFF;
135 mac_addr[5] = (mac_lo & 0xFF00) >> 8;
136
137 if (!env_get("eth1addr")) {
138 if (is_valid_ethaddr(mac_addr))
139 eth_env_set_enetaddr("eth1addr", mac_addr);
140 }
141#endif
142
143 return 0;
144}
145#endif
146