uboot/doc/README.omap3
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   1
   2Summary
   3=======
   4
   5This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
   6family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
   7some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
   8graphics processor and various other standard peripherals.
   9
  10Currently the following boards are supported:
  11
  12* OMAP3530 BeagleBoard [2]
  13
  14* Gumstix Overo [3]
  15
  16* TI EVM [4]
  17
  18* OpenPandora Ltd. Pandora [5]
  19
  20* TI/Logic PD Zoom MDK [6]
  21
  22* TI/Logic PD Zoom 2 [7]
  23
  24* CompuLab Ltd. CM-T35 [8]
  25
  26Build
  27=====
  28
  29* BeagleBoard:
  30
  31make omap3_beagle_config
  32make
  33
  34* Gumstix Overo:
  35
  36make omap3_overo_config
  37make
  38
  39* TI EVM:
  40
  41make omap3_evm_config
  42make
  43
  44* Zoom 2:
  45
  46make omap3_zoom2_config
  47make
  48
  49* CM-T35:
  50
  51make cm_t35_config
  52make
  53
  54
  55Custom commands
  56===============
  57
  58To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
  59for OMAP3 supports custom user command
  60
  61nandecc hw/sw
  62
  63To be compatible with NAND drivers using SW ECC (e.g. kernel code)
  64
  65nandecc sw
  66
  67enables SW ECC calculation. HW ECC enabled with
  68
  69nandecc hw
  70
  71is typically used to write 2nd stage bootloader (known as 'x-loader') which is
  72executed by OMAP3's boot rom and therefore has to be written with HW ECC.
  73
  74For all other commands see
  75
  76help
  77
  78Interfaces
  79==========
  80
  81gpio
  82----
  83
  84To set a bit :
  85
  86        if (!gpio_request(N, "")) {
  87                gpio_direction_output(N, 0);
  88                gpio_set_value(N, 1);
  89        }
  90
  91To clear a bit :
  92
  93        if (!gpio_request(N, "")) {
  94                gpio_direction_output(N, 0);
  95                gpio_set_value(N, 0);
  96        }
  97
  98To read a bit :
  99
 100        if (!gpio_request(N, "")) {
 101                gpio_direction_input(N);
 102                val = gpio_get_value(N);
 103                gpio_free(N);
 104        }
 105        if (val)
 106                printf("GPIO N is set\n");
 107        else
 108                printf("GPIO N is clear\n");
 109
 110dma
 111---
 112void omap3_dma_init(void)
 113        Init the DMA module
 114int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
 115        Read config of the channel
 116int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
 117        Write config to the channel
 118int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
 119                uint32_t sze)
 120        Config source, destination and size of a transfer
 121int omap3_dma_wait_for_transfer(uint32_t chan)
 122        Wait for a transfer to end - this hast to be called before a channel
 123        or the data the channel transferd are used.
 124int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
 125        Read silicon Revision of the DMA module
 126
 127NAND
 128====
 129
 130There are some OMAP3 devices out there with NAND attached. Due to the fact that
 131OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
 132(place where SPL lives) we require this setup for u-boot at least when reading
 133the second progam within SPL.  A lot of newer NAND chips however require more
 134than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
 135handle this we can switch to another ECC algorithm after reading the payload
 136within SPL.
 137
 138BCH8
 139----
 140
 141To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
 142OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
 143and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
 144The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
 145implementation for OMAP3 works for you so the u-boot version should also.
 146When you require the SPL to read with BCH8 there are two more configs to
 147change:
 148
 149 * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
 150   GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
 151   arch/arm/include/asm/arch-omap3/omap_gpmc.h)
 152 * CONFIG_SYS_NAND_ECCSIZE must be 512
 153 * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
 154
 155Acknowledgements
 156================
 157
 158OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
 159several TI employees.
 160
 161Links
 162=====
 163
 164[1] OMAP3:
 165
 166http://www.ti.com/omap3 (high volume) and
 167http://www.ti.com/omap35x (broad market)
 168
 169[2] OMAP3530 BeagleBoard:
 170
 171http://beagleboard.org/
 172
 173[3] Gumstix Overo:
 174
 175http://www.gumstix.net/Overo/
 176
 177[4] TI EVM:
 178
 179http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
 180
 181[5] OpenPandora Ltd. Pandora:
 182
 183http://openpandora.org/
 184
 185[6] TI/Logic PD Zoom MDK:
 186
 187http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
 188
 189[7] TI/Logic PD Zoom 2
 190
 191http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
 192
 193[8] CompuLab Ltd. CM-T35:
 194
 195http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
 196
 197[9] TI OMAP3 U-Boot:
 198
 199http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
 200