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7#ifndef __AT91_PMC_H__
8#define __AT91_PMC_H__
9
10#include <linux/bitops.h>
11#include <linux/io.h>
12
13
14#define AT91_TO_CLK_ID(_t, _i) (((_t) << 8) | ((_i) & 0xff))
15#define AT91_CLK_ID_TO_DID(_i) ((_i) & 0xff)
16
17struct clk_range {
18 unsigned long min;
19 unsigned long max;
20};
21
22struct clk_master_layout {
23 u32 offset;
24 u32 mask;
25 u8 pres_shift;
26};
27
28extern const struct clk_master_layout at91rm9200_master_layout;
29extern const struct clk_master_layout at91sam9x5_master_layout;
30
31struct clk_master_characteristics {
32 struct clk_range output;
33 u32 divisors[5];
34 u8 have_div3_pres;
35};
36
37struct clk_pll_characteristics {
38 struct clk_range input;
39 int num_output;
40 const struct clk_range *output;
41 u16 *icpll;
42 u8 *out;
43 u8 upll : 1;
44};
45
46struct clk_pll_layout {
47 u32 pllr_mask;
48 u32 mul_mask;
49 u32 frac_mask;
50 u32 div_mask;
51 u32 endiv_mask;
52 u8 mul_shift;
53 u8 frac_shift;
54 u8 div_shift;
55 u8 endiv_shift;
56};
57
58struct clk_programmable_layout {
59 u8 pres_mask;
60 u8 pres_shift;
61 u8 css_mask;
62 u8 have_slck_mck;
63 u8 is_pres_direct;
64};
65
66struct clk_pcr_layout {
67 u32 offset;
68 u32 cmd;
69 u32 div_mask;
70 u32 gckcss_mask;
71 u32 pid_mask;
72};
73
74extern const struct clk_programmable_layout at91rm9200_programmable_layout;
75extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
76extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
77
78extern const struct clk_ops at91_clk_ops;
79
80struct clk *at91_clk_main_rc(void __iomem *reg, const char *name,
81 const char *parent_name);
82struct clk *at91_clk_main_osc(void __iomem *reg, const char *name,
83 const char *parent_name, bool bypass);
84struct clk *at91_clk_rm9200_main(void __iomem *reg, const char *name,
85 const char *parent_name);
86struct clk *at91_clk_sam9x5_main(void __iomem *reg, const char *name,
87 const char * const *parent_names, int num_parents,
88 const u32 *mux_table, int type);
89struct clk *
90sam9x60_clk_register_div_pll(void __iomem *base, const char *name,
91 const char *parent_name, u8 id,
92 const struct clk_pll_characteristics *characteristics,
93 const struct clk_pll_layout *layout, bool critical);
94struct clk *
95sam9x60_clk_register_frac_pll(void __iomem *base, const char *name,
96 const char *parent_name, u8 id,
97 const struct clk_pll_characteristics *characteristics,
98 const struct clk_pll_layout *layout, bool critical);
99struct clk *
100at91_clk_register_master_pres(void __iomem *base, const char *name,
101 const char * const *parent_names, int num_parents,
102 const struct clk_master_layout *layout,
103 const struct clk_master_characteristics *characteristics,
104 const u32 *mux_table);
105struct clk *
106at91_clk_register_master_div(void __iomem *base,
107 const char *name, const char *parent_name,
108 const struct clk_master_layout *layout,
109 const struct clk_master_characteristics *characteristics);
110struct clk *
111at91_clk_sama7g5_register_master(void __iomem *base, const char *name,
112 const char * const *parent_names, int num_parents,
113 const u32 *mux_table, const u32 *clk_mux_table,
114 bool critical, u8 id);
115struct clk *
116at91_clk_register_utmi(void __iomem *base, struct udevice *dev,
117 const char *name, const char *parent_name);
118struct clk *
119at91_clk_sama7g5_register_utmi(void __iomem *base, const char *name,
120 const char *parent_name);
121struct clk *
122at91_clk_register_programmable(void __iomem *base, const char *name,
123 const char * const *parent_names, u8 num_parents, u8 id,
124 const struct clk_programmable_layout *layout,
125 const u32 *clk_mux_table, const u32 *mux_table);
126struct clk *
127at91_clk_register_system(void __iomem *base, const char *name,
128 const char *parent_name, u8 id);
129struct clk *
130at91_clk_register_peripheral(void __iomem *base, const char *name,
131 const char *parent_name, u32 id);
132struct clk *
133at91_clk_register_sam9x5_peripheral(void __iomem *base,
134 const struct clk_pcr_layout *layout,
135 const char *name, const char *parent_name,
136 u32 id, const struct clk_range *range);
137struct clk *
138at91_clk_register_generic(void __iomem *base,
139 const struct clk_pcr_layout *layout, const char *name,
140 const char * const *parent_names,
141 const u32 *clk_mux_table, const u32 *mux_table,
142 u8 num_parents, u8 id, const struct clk_range *range);
143
144int at91_clk_mux_val_to_index(const u32 *table, u32 num_parents, u32 val);
145int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index);
146
147void pmc_read(void __iomem *base, unsigned int off, unsigned int *val);
148void pmc_write(void __iomem *base, unsigned int off, unsigned int val);
149void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
150 unsigned int bits);
151
152#endif
153
