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18#include <common.h>
19#include <clk.h>
20#include <dm.h>
21#include <generic-phy.h>
22#include <log.h>
23#include <malloc.h>
24#include <phy-sun4i-usb.h>
25#include <reset.h>
26#include <asm/arch/cpu.h>
27#include <asm/arch/clock.h>
28#include <dm/device_compat.h>
29#include <dm/lists.h>
30#include <dm/root.h>
31#include <linux/bitops.h>
32#include <linux/delay.h>
33#include <linux/usb/musb.h>
34#include "linux-compat.h"
35#include "musb_core.h"
36#include "musb_uboot.h"
37
38
39
40
41
42
43
44
45
46
47
48
49#define USBC_REG_o_ISCR 0x0400
50#define USBC_REG_o_PHYCTL 0x0404
51#define USBC_REG_o_PHYBIST 0x0408
52#define USBC_REG_o_PHYTUNE 0x040c
53
54#define USBC_REG_o_VEND0 0x0043
55
56
57#define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
58#define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
59#define USBC_BP_ISCR_EXT_ID_STATUS 28
60#define USBC_BP_ISCR_EXT_DM_STATUS 27
61#define USBC_BP_ISCR_EXT_DP_STATUS 26
62#define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
63#define USBC_BP_ISCR_MERGED_ID_STATUS 24
64
65#define USBC_BP_ISCR_ID_PULLUP_EN 17
66#define USBC_BP_ISCR_DPDM_PULLUP_EN 16
67#define USBC_BP_ISCR_FORCE_ID 14
68#define USBC_BP_ISCR_FORCE_VBUS_VALID 12
69#define USBC_BP_ISCR_VBUS_VALID_SRC 10
70
71#define USBC_BP_ISCR_HOSC_EN 7
72#define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
73#define USBC_BP_ISCR_ID_CHANGE_DETECT 5
74#define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
75#define USBC_BP_ISCR_IRQ_ENABLE 3
76#define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
77#define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
78#define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
79
80
81
82
83
84#define OFF_SUN6I_AHB_RESET0 0x2c0
85
86struct sunxi_musb_config {
87 struct musb_hdrc_config *config;
88};
89
90struct sunxi_glue {
91 struct musb_host_data mdata;
92 struct clk clk;
93 struct reset_ctl rst;
94 struct sunxi_musb_config *cfg;
95 struct device dev;
96 struct phy phy;
97};
98#define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
99
100static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
101{
102 u32 temp = reg_val;
103
104 temp &= ~BIT(USBC_BP_ISCR_VBUS_CHANGE_DETECT);
105 temp &= ~BIT(USBC_BP_ISCR_ID_CHANGE_DETECT);
106 temp &= ~BIT(USBC_BP_ISCR_DPDM_CHANGE_DETECT);
107
108 return temp;
109}
110
111static void USBC_EnableIdPullUp(__iomem void *base)
112{
113 u32 reg_val;
114
115 reg_val = musb_readl(base, USBC_REG_o_ISCR);
116 reg_val |= BIT(USBC_BP_ISCR_ID_PULLUP_EN);
117 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
118 musb_writel(base, USBC_REG_o_ISCR, reg_val);
119}
120
121static void USBC_EnableDpDmPullUp(__iomem void *base)
122{
123 u32 reg_val;
124
125 reg_val = musb_readl(base, USBC_REG_o_ISCR);
126 reg_val |= BIT(USBC_BP_ISCR_DPDM_PULLUP_EN);
127 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
128 musb_writel(base, USBC_REG_o_ISCR, reg_val);
129}
130
131static void USBC_ForceIdToLow(__iomem void *base)
132{
133 u32 reg_val;
134
135 reg_val = musb_readl(base, USBC_REG_o_ISCR);
136 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
137 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
138 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
139 musb_writel(base, USBC_REG_o_ISCR, reg_val);
140}
141
142static void USBC_ForceIdToHigh(__iomem void *base)
143{
144 u32 reg_val;
145
146 reg_val = musb_readl(base, USBC_REG_o_ISCR);
147 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
148 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
149 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
150 musb_writel(base, USBC_REG_o_ISCR, reg_val);
151}
152
153static void USBC_ForceVbusValidToLow(__iomem void *base)
154{
155 u32 reg_val;
156
157 reg_val = musb_readl(base, USBC_REG_o_ISCR);
158 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
159 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
160 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
161 musb_writel(base, USBC_REG_o_ISCR, reg_val);
162}
163
164static void USBC_ForceVbusValidToHigh(__iomem void *base)
165{
166 u32 reg_val;
167
168 reg_val = musb_readl(base, USBC_REG_o_ISCR);
169 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
170 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
171 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
172 musb_writel(base, USBC_REG_o_ISCR, reg_val);
173}
174
175static void USBC_ConfigFIFO_Base(void)
176{
177 u32 reg_value;
178
179
180 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
181 reg_value &= ~(0x03 << 0);
182 reg_value |= BIT(0);
183 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
184}
185
186
187
188
189
190static u8 last_int_usb;
191
192bool dfu_usb_get_reset(void)
193{
194 return !!(last_int_usb & MUSB_INTR_RESET);
195}
196
197
198
199
200
201static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
202{
203 struct musb *musb = __hci;
204 irqreturn_t retval = IRQ_NONE;
205
206
207 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
208 last_int_usb = musb->int_usb;
209 if (musb->int_usb)
210 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
211 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
212 if (musb->int_tx)
213 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
214 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
215 if (musb->int_rx)
216 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
217
218 if (musb->int_usb || musb->int_tx || musb->int_rx)
219 retval |= musb_interrupt(musb);
220
221 return retval;
222}
223
224
225static bool enabled = false;
226
227static int sunxi_musb_enable(struct musb *musb)
228{
229 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
230 int ret;
231
232 pr_debug("%s():\n", __func__);
233
234 musb_ep_select(musb->mregs, 0);
235 musb_writeb(musb->mregs, MUSB_FADDR, 0);
236
237 if (enabled)
238 return 0;
239
240
241 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
242
243 if (is_host_enabled(musb)) {
244 ret = sun4i_usb_phy_vbus_detect(&glue->phy);
245 if (ret == 1) {
246 printf("A charger is plugged into the OTG: ");
247 return -ENODEV;
248 }
249
250 ret = sun4i_usb_phy_id_detect(&glue->phy);
251 if (ret == 1) {
252 printf("No host cable detected: ");
253 return -ENODEV;
254 }
255
256 ret = generic_phy_power_on(&glue->phy);
257 if (ret) {
258 pr_debug("failed to power on USB PHY\n");
259 return ret;
260 }
261 }
262
263 USBC_ForceVbusValidToHigh(musb->mregs);
264
265 enabled = true;
266 return 0;
267}
268
269static void sunxi_musb_disable(struct musb *musb)
270{
271 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
272 int ret;
273
274 pr_debug("%s():\n", __func__);
275
276 if (!enabled)
277 return;
278
279 if (is_host_enabled(musb)) {
280 ret = generic_phy_power_off(&glue->phy);
281 if (ret) {
282 pr_debug("failed to power off USB PHY\n");
283 return;
284 }
285 }
286
287 USBC_ForceVbusValidToLow(musb->mregs);
288 mdelay(200);
289
290 enabled = false;
291}
292
293static int sunxi_musb_init(struct musb *musb)
294{
295 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
296 int ret;
297
298 pr_debug("%s():\n", __func__);
299
300 ret = clk_enable(&glue->clk);
301 if (ret) {
302 dev_err(musb->controller, "failed to enable clock\n");
303 return ret;
304 }
305
306 if (reset_valid(&glue->rst)) {
307 ret = reset_deassert(&glue->rst);
308 if (ret) {
309 dev_err(musb->controller, "failed to deassert reset\n");
310 goto err_clk;
311 }
312 }
313
314 ret = generic_phy_init(&glue->phy);
315 if (ret) {
316 dev_dbg(musb->controller, "failed to init USB PHY\n");
317 goto err_rst;
318 }
319
320 musb->isr = sunxi_musb_interrupt;
321
322 USBC_ConfigFIFO_Base();
323 USBC_EnableDpDmPullUp(musb->mregs);
324 USBC_EnableIdPullUp(musb->mregs);
325
326 if (is_host_enabled(musb)) {
327
328 USBC_ForceIdToLow(musb->mregs);
329 } else {
330
331 USBC_ForceIdToHigh(musb->mregs);
332 }
333 USBC_ForceVbusValidToHigh(musb->mregs);
334
335 return 0;
336
337err_rst:
338 if (reset_valid(&glue->rst))
339 reset_assert(&glue->rst);
340err_clk:
341 clk_disable(&glue->clk);
342 return ret;
343}
344
345static int sunxi_musb_exit(struct musb *musb)
346{
347 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
348 int ret = 0;
349
350 if (generic_phy_valid(&glue->phy)) {
351 ret = generic_phy_exit(&glue->phy);
352 if (ret) {
353 dev_dbg(musb->controller,
354 "failed to power off usb phy\n");
355 return ret;
356 }
357 }
358
359 if (reset_valid(&glue->rst))
360 reset_assert(&glue->rst);
361 clk_disable(&glue->clk);
362
363 return 0;
364}
365
366static void sunxi_musb_pre_root_reset_end(struct musb *musb)
367{
368 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
369
370 sun4i_usb_phy_set_squelch_detect(&glue->phy, false);
371}
372
373static void sunxi_musb_post_root_reset_end(struct musb *musb)
374{
375 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
376
377 sun4i_usb_phy_set_squelch_detect(&glue->phy, true);
378}
379
380static const struct musb_platform_ops sunxi_musb_ops = {
381 .init = sunxi_musb_init,
382 .exit = sunxi_musb_exit,
383 .enable = sunxi_musb_enable,
384 .disable = sunxi_musb_disable,
385 .pre_root_reset_end = sunxi_musb_pre_root_reset_end,
386 .post_root_reset_end = sunxi_musb_post_root_reset_end,
387};
388
389
390#define SUNXI_MUSB_MAX_EP_NUM 6
391#define SUNXI_MUSB_RAM_BITS 11
392
393static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = {
394 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
395 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
396 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
397 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
398 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
399 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
400 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
401 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
402 MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
403 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
404};
405
406
407#define SUNXI_MUSB_MAX_EP_NUM_H3 5
408
409static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {
410 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
411 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
412 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
413 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
414 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
415 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
416 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
417 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
418};
419
420static struct musb_hdrc_config musb_config = {
421 .fifo_cfg = sunxi_musb_mode_cfg,
422 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg),
423 .multipoint = true,
424 .dyn_fifo = true,
425 .num_eps = SUNXI_MUSB_MAX_EP_NUM,
426 .ram_bits = SUNXI_MUSB_RAM_BITS,
427};
428
429static struct musb_hdrc_config musb_config_h3 = {
430 .fifo_cfg = sunxi_musb_mode_cfg_h3,
431 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),
432 .multipoint = true,
433 .dyn_fifo = true,
434 .soft_con = true,
435 .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3,
436 .ram_bits = SUNXI_MUSB_RAM_BITS,
437};
438
439static int musb_usb_probe(struct udevice *dev)
440{
441 struct sunxi_glue *glue = dev_get_priv(dev);
442 struct musb_host_data *host = &glue->mdata;
443 struct musb_hdrc_platform_data pdata;
444 void *base = dev_read_addr_ptr(dev);
445 int ret;
446
447#ifdef CONFIG_USB_MUSB_HOST
448 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
449#endif
450
451 if (!base)
452 return -EINVAL;
453
454 glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev);
455 if (!glue->cfg)
456 return -EINVAL;
457
458 ret = clk_get_by_index(dev, 0, &glue->clk);
459 if (ret) {
460 dev_err(dev, "failed to get clock\n");
461 return ret;
462 }
463
464 ret = reset_get_by_index(dev, 0, &glue->rst);
465 if (ret && ret != -ENOENT) {
466 dev_err(dev, "failed to get reset\n");
467 return ret;
468 }
469
470 ret = generic_phy_get_by_name(dev, "usb", &glue->phy);
471 if (ret) {
472 pr_err("failed to get usb PHY\n");
473 return ret;
474 }
475
476 memset(&pdata, 0, sizeof(pdata));
477 pdata.power = 250;
478 pdata.platform_ops = &sunxi_musb_ops;
479 pdata.config = glue->cfg->config;
480
481#ifdef CONFIG_USB_MUSB_HOST
482 priv->desc_before_addr = true;
483
484 pdata.mode = MUSB_HOST;
485 host->host = musb_init_controller(&pdata, &glue->dev, base);
486 if (!host->host)
487 return -EIO;
488
489 ret = musb_lowlevel_init(host);
490 if (!ret)
491 printf("Allwinner mUSB OTG (Host)\n");
492#else
493 pdata.mode = MUSB_PERIPHERAL;
494 host->host = musb_register(&pdata, &glue->dev, base);
495 if (!host->host)
496 return -EIO;
497
498 printf("Allwinner mUSB OTG (Peripheral)\n");
499#endif
500
501 return ret;
502}
503
504static int musb_usb_remove(struct udevice *dev)
505{
506 struct sunxi_glue *glue = dev_get_priv(dev);
507 struct musb_host_data *host = &glue->mdata;
508
509 musb_stop(host->host);
510 free(host->host);
511 host->host = NULL;
512
513 return 0;
514}
515
516static const struct sunxi_musb_config sun4i_a10_cfg = {
517 .config = &musb_config,
518};
519
520static const struct sunxi_musb_config sun6i_a31_cfg = {
521 .config = &musb_config,
522};
523
524static const struct sunxi_musb_config sun8i_h3_cfg = {
525 .config = &musb_config_h3,
526};
527
528static const struct udevice_id sunxi_musb_ids[] = {
529 { .compatible = "allwinner,sun4i-a10-musb",
530 .data = (ulong)&sun4i_a10_cfg },
531 { .compatible = "allwinner,sun6i-a31-musb",
532 .data = (ulong)&sun6i_a31_cfg },
533 { .compatible = "allwinner,sun8i-a33-musb",
534 .data = (ulong)&sun6i_a31_cfg },
535 { .compatible = "allwinner,sun8i-h3-musb",
536 .data = (ulong)&sun8i_h3_cfg },
537 { }
538};
539
540U_BOOT_DRIVER(usb_musb) = {
541 .name = "sunxi-musb",
542#ifdef CONFIG_USB_MUSB_HOST
543 .id = UCLASS_USB,
544#else
545 .id = UCLASS_USB_GADGET_GENERIC,
546#endif
547 .of_match = sunxi_musb_ids,
548 .probe = musb_usb_probe,
549 .remove = musb_usb_remove,
550#ifdef CONFIG_USB_MUSB_HOST
551 .ops = &musb_usb_ops,
552#endif
553 .plat_auto = sizeof(struct usb_plat),
554 .priv_auto = sizeof(struct sunxi_glue),
555};
556
