1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2021 Rockchip Electronics Co., Ltd 4 */ 5 6#ifndef __CONFIG_RK3568_COMMON_H 7#define __CONFIG_RK3568_COMMON_H 8 9#include "rockchip-common.h" 10 11#define CONFIG_SYS_CBSIZE 1024 12 13#define COUNTER_FREQUENCY 24000000 14#define CONFIG_ROCKCHIP_STIMER_BASE 0xfdd1c020 15 16#define CONFIG_IRAM_BASE 0xfdcc0000 17 18#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 19 20#define CONFIG_SPL_STACK 0x00400000 21#define CONFIG_SPL_MAX_SIZE 0x20000 22#define CONFIG_SPL_BSS_START_ADDR 0x4000000 23#define CONFIG_SPL_BSS_MAX_SIZE 0x4000 24 25#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 26 27#define CONFIG_SYS_SDRAM_BASE 0 28#define SDRAM_MAX_SIZE 0xf0000000 29 30#ifndef CONFIG_SPL_BUILD 31#define ENV_MEM_LAYOUT_SETTINGS \ 32 "scriptaddr=0x00c00000\0" \ 33 "pxefile_addr_r=0x00e00000\0" \ 34 "fdt_addr_r=0x0a100000\0" \ 35 "kernel_addr_r=0x02080000\0" \ 36 "ramdisk_addr_r=0x0a200000\0" 37 38#include <config_distro_bootcmd.h> 39#define CONFIG_EXTRA_ENV_SETTINGS \ 40 ENV_MEM_LAYOUT_SETTINGS \ 41 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 42 "partitions=" PARTS_DEFAULT \ 43 ROCKCHIP_DEVICE_SETTINGS \ 44 BOOTENV 45#endif 46 47#endif 48