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5
6#ifndef __DDR_H__
7#define __DDR_H__
8
9void erratum_a008850_post(void);
10
11struct board_specific_parameters {
12 u32 n_ranks;
13 u32 datarate_mhz_high;
14 u32 rank_gb;
15 u32 clk_adjust;
16 u32 wrlvl_start;
17 u32 wrlvl_ctl_2;
18 u32 wrlvl_ctl_3;
19};
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21
22
23
24
25
26static const struct board_specific_parameters udimm0[] = {
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30
31
32 {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
33 {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,},
34 {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,},
35 {2, 2300, 0, 8, 7, 0x08090A0E, 0x1011120C,},
36 {}
37};
38
39static const struct board_specific_parameters *udimms[] = {
40 udimm0,
41};
42
43static const struct board_specific_parameters rdimm0[] = {
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45
46
47
48
49 {2, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
50 {2, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
51 {2, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
52 {1, 1666, 0, 0x8, 0x0D, 0x0C0B0A08, 0x0A0B0C08,},
53 {1, 1900, 0, 0x8, 0x0E, 0x0D0C0B09, 0x0B0C0D09,},
54 {1, 2300, 0, 0xa, 0x12, 0x100F0D0C, 0x0E0F100C,},
55 {}
56};
57
58static const struct board_specific_parameters *rdimms[] = {
59 rdimm0,
60};
61
62#endif
63