LXR uboot/board/technexion/pico-imx6ul/pico-imx6ul.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * Copyright (C) 2015 Technexion Ltd.
   4 *
   5 * Author: Richard Hu <richard.hu@technexion.com>
   6 */
   7
   8#include <init.h>
   9#include <net.h>
  10#include <asm/arch/clock.h>
  11#include <asm/arch/iomux.h>
  12#include <asm/arch/imx-regs.h>
  13#include <asm/arch/crm_regs.h>
  14#include <asm/arch/mx6-pins.h>
  15#include <asm/arch/sys_proto.h>
  16#include <asm/global_data.h>
  17#include <asm/gpio.h>
  18#include <asm/mach-imx/iomux-v3.h>
  19#include <asm/io.h>
  20#include <common.h>
  21#include <miiphy.h>
  22#include <linux/delay.h>
  23#include <linux/sizes.h>
  24#include <usb.h>
  25#include <power/pmic.h>
  26#include <power/pfuze3000_pmic.h>
  27#include "../../freescale/common/pfuze.h"
  28
  29DECLARE_GLOBAL_DATA_PTR;
  30
  31#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |             \
  32        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
  33        PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  34
  35#define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |            \
  36        PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |               \
  37        PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  38
  39#define MDIO_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |     \
  40        PAD_CTL_DSE_48ohm   | PAD_CTL_SRE_FAST | PAD_CTL_ODE)
  41
  42#define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
  43        PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
  44
  45static int setup_fec(void)
  46{
  47        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
  48        int ret;
  49
  50        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
  51                        IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
  52
  53        ret = enable_fec_anatop_clock(1, ENET_50MHZ);
  54        if (ret)
  55                return ret;
  56
  57        enable_enet_clk(1);
  58
  59        return 0;
  60}
  61
  62#ifdef CONFIG_VIDEO_MXS
  63static iomux_v3_cfg_t const lcd_pads[] = {
  64        MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
  65        MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
  66        MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
  67        MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
  68        MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  69        MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  70        MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  71        MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  72        MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  73        MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  74        MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  75        MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  76        MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  77        MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  78        MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  79        MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  80        MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  81        MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  82        MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  83        MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  84        MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  85        MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  86        MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  87        MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  88        MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  89        MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  90        MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  91        MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL),
  92        /* LCD_BLT_CTRL: GPIO for Brightness adjustment  */
  93        MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
  94        /* LCD_VDD_EN: LCD enabled */
  95        MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
  96};
  97
  98void setup_lcd(void)
  99{
 100        imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
 101        gpio_request(IMX_GPIO_NR(4, 10), "lcd_brightness");
 102        gpio_request(IMX_GPIO_NR(1, 11), "lcd_enable");
 103        /* Set Brightness to high */
 104        gpio_direction_output(IMX_GPIO_NR(4, 10) , 1);
 105        /* Set LCD enable to high */
 106        gpio_direction_output(IMX_GPIO_NR(1, 11) , 1);
 107}
 108#endif
 109
 110int board_phy_config(struct phy_device *phydev)
 111{
 112        phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
 113
 114        if (phydev->drv->config)
 115                phydev->drv->config(phydev);
 116
 117        return 0;
 118}
 119
 120int dram_init(void)
 121{
 122        gd->ram_size = imx_ddr_size();
 123
 124        return 0;
 125}
 126
 127static iomux_v3_cfg_t const uart6_pads[] = {
 128        MX6_PAD_CSI_MCLK__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
 129        MX6_PAD_CSI_PIXCLK__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
 130};
 131
 132#define USB_OTHERREGS_OFFSET    0x800
 133#define UCTRL_PWR_POL           (1 << 9)
 134
 135static iomux_v3_cfg_t const usb_otg_pad[] = {
 136        MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID | MUX_PAD_CTRL(OTG_ID_PAD_CTRL),
 137};
 138
 139static void setup_iomux_uart(void)
 140{
 141        imx_iomux_v3_setup_multiple_pads(uart6_pads, ARRAY_SIZE(uart6_pads));
 142}
 143
 144static void setup_usb(void)
 145{
 146        imx_iomux_v3_setup_multiple_pads(usb_otg_pad, ARRAY_SIZE(usb_otg_pad));
 147}
 148
 149int board_early_init_f(void)
 150{
 151        setup_iomux_uart();
 152
 153        return 0;
 154}
 155
 156#ifdef CONFIG_DM_PMIC
 157int power_init_board(void)
 158{
 159        struct udevice *dev;
 160        int ret, dev_id, rev_id;
 161
 162        ret = pmic_get("pfuze3000@8", &dev);
 163        if (ret == -ENODEV)
 164                return 0;
 165        if (ret != 0)
 166                return ret;
 167
 168        dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
 169        rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
 170        printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
 171
 172        /* disable Low Power Mode during standby mode */
 173        pmic_reg_write(dev, PFUZE3000_LDOGCTL, 0x1);
 174
 175        /* SW1B step ramp up time from 2us to 4us/25mV */
 176        pmic_reg_write(dev, PFUZE3000_SW1BCONF, 0x40);
 177
 178        /* SW1B mode to APS/PFM */
 179        pmic_reg_write(dev, PFUZE3000_SW1BMODE, 0xc);
 180
 181        /* SW1B standby voltage set to 0.975V */
 182        pmic_reg_write(dev, PFUZE3000_SW1BSTBY, 0xb);
 183
 184        return 0;
 185}
 186#endif
 187
 188int board_usb_phy_mode(int port)
 189{
 190        if (port == 1)
 191                return USB_INIT_HOST;
 192        else
 193                return USB_INIT_DEVICE;
 194}
 195
 196int board_ehci_hcd_init(int port)
 197{
 198        u32 *usbnc_usb_ctrl;
 199
 200        if (port > 1)
 201                return -EINVAL;
 202
 203        usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
 204                                 port * 4);
 205
 206        /* Set Power polarity */
 207        setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
 208
 209        return 0;
 210}
 211
 212int board_init(void)
 213{
 214        /* Address of boot parameters */
 215        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 216
 217        setup_fec();
 218        setup_usb();
 219#ifdef CONFIG_VIDEO_MXS
 220        setup_lcd();
 221#endif
 222        return 0;
 223}
 224
 225int checkboard(void)
 226{
 227        puts("Board: PICO-IMX6UL-EMMC\n");
 228
 229        return 0;
 230}
 231