LXR uboot/include/configs/imx8mm_icore

   1/* SPDX-License-Identifier: GPL-2.0+ */
   2/*
   3 * Copyright (c) 2020 Engicam srl
   4 * Copyright (c) 2020 Amarula Solutions(India)
   5 */
   6
   7#ifndef __IMX8MM_ICORE_MX8MM_H
   8#define __IMX8MM_ICORE_MX8MM_H
   9
  10#include <linux/sizes.h>
  11#include <asm/arch/imx-regs.h>
  12
  13#define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  14#define CONFIG_SYS_MONITOR_LEN          SZ_512K
  15#define CONFIG_SYS_UBOOT_BASE \
  16        (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  17
  18#ifdef CONFIG_SPL_BUILD
  19# define CONFIG_SPL_STACK               0x920000
  20# define CONFIG_SPL_BSS_START_ADDR      0x910000
  21# define CONFIG_SPL_BSS_MAX_SIZE        SZ_8K
  22# define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  23# define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K
  24
  25/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  26# define CONFIG_MALLOC_F_ADDR           0x930000
  27/* For RAW image gives a error info not panic */
  28# define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  29#endif /* CONFIG_SPL_BUILD */
  30
  31#ifndef CONFIG_SPL_BUILD
  32#define BOOT_TARGET_DEVICES(func) \
  33        func(MMC, mmc, 2) \
  34        func(MMC, mmc, 0)
  35#include <config_distro_bootcmd.h>
  36#else
  37#define BOOTENV
  38#endif
  39
  40#define ENV_MEM_LAYOUT_SETTINGS \
  41        "fdt_addr_r=0x44000000\0" \
  42        "kernel_addr_r=0x42000000\0" \
  43        "ramdisk_addr_r=0x46400000\0" \
  44        "scriptaddr=0x46000000\0"
  45
  46#define CONFIG_EXTRA_ENV_SETTINGS \
  47        ENV_MEM_LAYOUT_SETTINGS \
  48        "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  49        "console=ttymxc1,115200\0" \
  50        BOOTENV
  51
  52/* Link Definitions */
  53
  54#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  55#define CONFIG_SYS_INIT_RAM_SIZE        SZ_2M
  56#define CONFIG_SYS_INIT_SP_OFFSET \
  57        (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  58#define CONFIG_SYS_INIT_SP_ADDR \
  59        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  60
  61#define CONFIG_SYS_SDRAM_BASE           0x40000000
  62
  63/* SDRAM configuration */
  64#define PHYS_SDRAM                      0x40000000
  65#define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
  66#define CONFIG_SYS_BOOTM_LEN            SZ_256M
  67
  68/* UART */
  69#define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(2)
  70
  71/* Monitor Command Prompt */
  72#define CONFIG_SYS_CBSIZE               2048
  73#define CONFIG_SYS_MAXARGS              64
  74#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  75#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  76                                        sizeof(CONFIG_SYS_PROMPT) + 16)
  77
  78/* USDHC */
  79#define CONFIG_SYS_FSL_USDHC_NUM        2
  80#define CONFIG_SYS_FSL_ESDHC_ADDR       0
  81
  82#endif /* __IMX8MM_ICORE_MX8MM_H */
  83