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7#include <common.h>
8#include <flash.h>
9#include <image.h>
10#include <init.h>
11#include <net.h>
12#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
13#include <netdev.h>
14#endif
15#include <asm/global_data.h>
16#include <linux/io.h>
17#include <faraday/ftsmc020.h>
18#include <fdtdec.h>
19#include <dm.h>
20#include <spl.h>
21
22DECLARE_GLOBAL_DATA_PTR;
23
24
25
26
27
28int board_init(void)
29{
30 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
31
32 return 0;
33}
34
35int dram_init(void)
36{
37 return fdtdec_setup_mem_size_base();
38}
39
40int dram_init_banksize(void)
41{
42 return fdtdec_setup_memory_banksize();
43}
44
45#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
46int board_eth_init(struct bd_info *bd)
47{
48 return ftmac100_initialize(bd);
49}
50#endif
51
52ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
53{
54 return 0;
55}
56
57#define ANDES_HW_DTB_ADDRESS 0xF2000000
58void *board_fdt_blob_setup(int *err)
59{
60 *err = 0;
61
62 if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
63 if (gd->arch.firmware_fdt_addr)
64 return (void *)(ulong)gd->arch.firmware_fdt_addr;
65 }
66
67 if (fdt_magic(CONFIG_SYS_FDT_BASE) == FDT_MAGIC)
68 return (void *)CONFIG_SYS_FDT_BASE;
69 return (void *)ANDES_HW_DTB_ADDRESS;
70
71 *err = -EINVAL;
72 return NULL;
73}
74
75int smc_init(void)
76{
77 int node = -1;
78 const char *compat = "andestech,atfsmc020";
79 void *blob = (void *)gd->fdt_blob;
80 fdt_addr_t addr;
81 struct ftsmc020_bank *regs;
82
83 node = fdt_node_offset_by_compatible(blob, -1, compat);
84 if (node < 0)
85 return -FDT_ERR_NOTFOUND;
86
87 addr = fdtdec_get_addr_size_auto_noparent(blob, node,
88 "reg", 0, NULL, false);
89
90 if (addr == FDT_ADDR_T_NONE)
91 return -EINVAL;
92
93 regs = (struct ftsmc020_bank *)(uintptr_t)addr;
94 regs->cr &= ~FTSMC020_BANK_WPROT;
95
96 return 0;
97}
98
99static void v5l2_init(void)
100{
101 struct udevice *dev;
102
103 uclass_get_device(UCLASS_CACHE, 0, &dev);
104}
105
106#ifdef CONFIG_BOARD_EARLY_INIT_F
107int board_early_init_f(void)
108{
109 smc_init();
110 v5l2_init();
111
112 return 0;
113}
114#endif
115
116#ifdef CONFIG_SPL
117void board_boot_order(u32 *spl_boot_list)
118{
119 u8 i;
120 u32 boot_devices[] = {
121#ifdef CONFIG_SPL_RAM_SUPPORT
122 BOOT_DEVICE_RAM,
123#endif
124#ifdef CONFIG_SPL_MMC
125 BOOT_DEVICE_MMC1,
126#endif
127 };
128
129 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
130 spl_boot_list[i] = boot_devices[i];
131}
132#endif
133
134#ifdef CONFIG_SPL_LOAD_FIT
135int board_fit_config_name_match(const char *name)
136{
137
138 return 0;
139}
140#endif
141