LXR uboot/board/compulab/common/omap3

   1// SPDX-License-Identifier: GPL-2.0+
   2/*
   3 * (C) Copyright 2012 - 2013 CompuLab, Ltd. <www.compulab.co.il>
   4 *
   5 * Authors: Nikita Kiryanov <nikita@compulab.co.il>
   6 *
   7 * Parsing code based on linux/drivers/video/pxafb.c
   8 */
   9
  10#include <common.h>
  11#include <asm/gpio.h>
  12#include <asm/io.h>
  13#include <env.h>
  14#include <stdio_dev.h>
  15#include <asm/arch/dss.h>
  16#include <lcd.h>
  17#include <scf0403_lcd.h>
  18#include <asm/arch-omap3/dss.h>
  19
  20enum display_type {
  21        NONE,
  22        DVI,
  23        DVI_CUSTOM,
  24        DATA_IMAGE, /* #define CONFIG_SCF0403_LCD to use */
  25};
  26
  27#define CMAP_ADDR       0x80100000
  28
  29/*
  30 * The frame buffer is allocated before we have the chance to parse user input.
  31 * To make sure enough memory is allocated for all resolutions, we define
  32 * vl_{col | row} to the maximal resolution supported by OMAP3.
  33 */
  34vidinfo_t panel_info = {
  35        .vl_col  = 1400,
  36        .vl_row  = 1050,
  37        .vl_bpix = LCD_BPP,
  38        .cmap = (ushort *)CMAP_ADDR,
  39};
  40
  41static struct panel_config panel_cfg;
  42static enum display_type lcd_def;
  43
  44/*
  45 * A note on DVI presets;
  46 * U-Boot can convert 8 bit BMP data to 16 bit BMP data, and OMAP DSS can
  47 * convert 16 bit data into 24 bit data. Thus, GFXFORMAT_RGB16 allows us to
  48 * support two BMP types with one setting.
  49 */
  50static const struct panel_config preset_dvi_640X480 = {
  51        .lcd_size       = PANEL_LCD_SIZE(640, 480),
  52        .timing_h       = DSS_HBP(48) | DSS_HFP(16) | DSS_HSW(96),
  53        .timing_v       = DSS_VBP(33) | DSS_VFP(10) | DSS_VSW(2),
  54        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
  55        .divisor        = 12 | (1 << 16),
  56        .data_lines     = LCD_INTERFACE_24_BIT,
  57        .panel_type     = ACTIVE_DISPLAY,
  58        .load_mode      = 2,
  59        .gfx_format     = GFXFORMAT_RGB16,
  60};
  61
  62static const struct panel_config preset_dvi_800X600 = {
  63        .lcd_size       = PANEL_LCD_SIZE(800, 600),
  64        .timing_h       = DSS_HBP(88) | DSS_HFP(40) | DSS_HSW(128),
  65        .timing_v       = DSS_VBP(23) | DSS_VFP(1) | DSS_VSW(4),
  66        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
  67        .divisor        = 8 | (1 << 16),
  68        .data_lines     = LCD_INTERFACE_24_BIT,
  69        .panel_type     = ACTIVE_DISPLAY,
  70        .load_mode      = 2,
  71        .gfx_format     = GFXFORMAT_RGB16,
  72};
  73
  74static const struct panel_config preset_dvi_1024X768 = {
  75        .lcd_size       = PANEL_LCD_SIZE(1024, 768),
  76        .timing_h       = DSS_HBP(160) | DSS_HFP(24) | DSS_HSW(136),
  77        .timing_v       = DSS_VBP(29) | DSS_VFP(3) | DSS_VSW(6),
  78        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
  79        .divisor        = 5 | (1 << 16),
  80        .data_lines     = LCD_INTERFACE_24_BIT,
  81        .panel_type     = ACTIVE_DISPLAY,
  82        .load_mode      = 2,
  83        .gfx_format     = GFXFORMAT_RGB16,
  84};
  85
  86static const struct panel_config preset_dvi_1152X864 = {
  87        .lcd_size       = PANEL_LCD_SIZE(1152, 864),
  88        .timing_h       = DSS_HBP(256) | DSS_HFP(64) | DSS_HSW(128),
  89        .timing_v       = DSS_VBP(32) | DSS_VFP(1) | DSS_VSW(3),
  90        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
  91        .divisor        = 4 | (1 << 16),
  92        .data_lines     = LCD_INTERFACE_24_BIT,
  93        .panel_type     = ACTIVE_DISPLAY,
  94        .load_mode      = 2,
  95        .gfx_format     = GFXFORMAT_RGB16,
  96};
  97
  98static const struct panel_config preset_dvi_1280X960 = {
  99        .lcd_size       = PANEL_LCD_SIZE(1280, 960),
 100        .timing_h       = DSS_HBP(312) | DSS_HFP(96) | DSS_HSW(112),
 101        .timing_v       = DSS_VBP(36) | DSS_VFP(1) | DSS_VSW(3),
 102        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
 103        .divisor        = 3 | (1 << 16),
 104        .data_lines     = LCD_INTERFACE_24_BIT,
 105        .panel_type     = ACTIVE_DISPLAY,
 106        .load_mode      = 2,
 107        .gfx_format     = GFXFORMAT_RGB16,
 108};
 109
 110static const struct panel_config preset_dvi_1280X1024 = {
 111        .lcd_size       = PANEL_LCD_SIZE(1280, 1024),
 112        .timing_h       = DSS_HBP(248) | DSS_HFP(48) | DSS_HSW(112),
 113        .timing_v       = DSS_VBP(38) | DSS_VFP(1) | DSS_VSW(3),
 114        .pol_freq       = DSS_IHS | DSS_IVS | DSS_IPC,
 115        .divisor        = 3 | (1 << 16),
 116        .data_lines     = LCD_INTERFACE_24_BIT,
 117        .panel_type     = ACTIVE_DISPLAY,
 118        .load_mode      = 2,
 119        .gfx_format     = GFXFORMAT_RGB16,
 120};
 121
 122static const struct panel_config preset_dataimage_480X800 = {
 123        .lcd_size       = PANEL_LCD_SIZE(480, 800),
 124        .timing_h       = DSS_HBP(2) | DSS_HFP(2) | DSS_HSW(2),
 125        .timing_v       = DSS_VBP(17) | DSS_VFP(20) | DSS_VSW(3),
 126        .pol_freq       = DSS_IVS | DSS_IHS | DSS_IPC | DSS_ONOFF,
 127        .divisor        = 10 | (1 << 10),
 128        .data_lines     = LCD_INTERFACE_18_BIT,
 129        .panel_type     = ACTIVE_DISPLAY,
 130        .load_mode      = 2,
 131        .gfx_format     = GFXFORMAT_RGB16,
 132};
 133
 134/*
 135 * set_resolution_params()
 136 *
 137 * Due to usage of multiple display related APIs resolution data is located in
 138 * more than one place. This function updates them all.
 139 */
 140static void set_resolution_params(int x, int y)
 141{
 142        panel_cfg.lcd_size = PANEL_LCD_SIZE(x, y);
 143        panel_info.vl_col = x;
 144        panel_info.vl_row = y;
 145        lcd_line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
 146}
 147
 148static void set_preset(const struct panel_config preset, int x_res, int y_res)
 149{
 150        panel_cfg = preset;
 151        set_resolution_params(x_res, y_res);
 152}
 153
 154static enum display_type set_dvi_preset(const struct panel_config preset,
 155                                        int x_res, int y_res)
 156{
 157        set_preset(preset, x_res, y_res);
 158        return DVI;
 159}
 160
 161static enum display_type set_dataimage_preset(const struct panel_config preset,
 162                int x_res, int y_res)
 163{
 164        set_preset(preset, x_res, y_res);
 165        return DATA_IMAGE;
 166}
 167
 168/*
 169 * parse_mode() - parse the mode parameter of custom lcd settings
 170 *
 171 * @mode:       <res_x>x<res_y>
 172 *
 173 * Returns -1 on error, 0 on success.
 174 */
 175static int parse_mode(const char *mode)
 176{
 177        unsigned int modelen = strlen(mode);
 178        int res_specified = 0;
 179        unsigned int xres = 0, yres = 0;
 180        int yres_specified = 0;
 181        int i;
 182
 183        for (i = modelen - 1; i >= 0; i--) {
 184                switch (mode[i]) {
 185                case 'x':
 186                        if (!yres_specified) {
 187                                yres = simple_strtoul(&mode[i + 1], NULL, 0);
 188                                yres_specified = 1;
 189                        } else {
 190                                goto done_parsing;
 191                        }
 192
 193                        break;
 194                case '0' ... '9':
 195                        break;
 196                default:
 197                        goto done_parsing;
 198                }
 199        }
 200
 201        if (i < 0 && yres_specified) {
 202                xres = simple_strtoul(mode, NULL, 0);
 203                res_specified = 1;
 204        }
 205
 206done_parsing:
 207        if (res_specified) {
 208                set_resolution_params(xres, yres);
 209        } else {
 210                printf("LCD: invalid mode: %s\n", mode);
 211                return -1;
 212        }
 213
 214        return 0;
 215}
 216
 217#define PIXEL_CLK_NUMERATOR (26 * 432 / 39)
 218/*
 219 * parse_pixclock() - Parse the pixclock parameter of custom lcd settings
 220 *
 221 * @pixclock:   the desired pixel clock
 222 *
 223 * Returns -1 on error, 0 on success.
 224 *
 225 * Handling the pixel_clock:
 226 *
 227 * Pixel clock is defined in the OMAP35x TRM as follows:
 228 * pixel_clock =
 229 * (SYS_CLK * 2 * PRCM.CM_CLKSEL2_PLL[18:8]) /
 230 * (DSS.DISPC_DIVISOR[23:16] * DSS.DISPC_DIVISOR[6:0] *
 231 * PRCM.CM_CLKSEL_DSS[4:0] * (PRCM.CM_CLKSEL2_PLL[6:0] + 1))
 232 *
 233 * In practice, this means that in order to set the
 234 * divisor for the desired pixel clock one needs to
 235 * solve the following equation:
 236 *
 237 * 26 * 432 / (39 * <pixel_clock>) = DSS.DISPC_DIVISOR[6:0]
 238 *
 239 * NOTE: the explicit equation above is reduced. Do not
 240 * try to infer anything from these numbers.
 241 */
 242static int parse_pixclock(char *pixclock)
 243{
 244        int divisor, pixclock_val;
 245        char *pixclk_start = pixclock;
 246
 247        pixclock_val = dectoul(pixclock, &pixclock);
 248        divisor = DIV_ROUND_UP(PIXEL_CLK_NUMERATOR, pixclock_val);
 249        /* 0 and 1 are illegal values for PCD */
 250        if (divisor <= 1)
 251                divisor = 2;
 252
 253        panel_cfg.divisor = divisor | (1 << 16);
 254        if (pixclock[0] != '\0') {
 255                printf("LCD: invalid value for pixclock:%s\n", pixclk_start);
 256                return -1;
 257        }
 258
 259        return 0;
 260}
 261
 262/*
 263 * parse_setting() - parse a single setting of custom lcd parameters
 264 *
 265 * @setting:    The custom lcd setting <name>:<value>
 266 *
 267 * Returns -1 on failure, 0 on success.
 268 */
 269static int parse_setting(char *setting)
 270{
 271        int num_val;
 272        char *setting_start = setting;
 273
 274        if (!strncmp(setting, "mode:", 5)) {
 275                return parse_mode(setting + 5);
 276        } else if (!strncmp(setting, "pixclock:", 9)) {
 277                return parse_pixclock(setting + 9);
 278        } else if (!strncmp(setting, "left:", 5)) {
 279                num_val = simple_strtoul(setting + 5, &setting, 0);
 280                panel_cfg.timing_h |= DSS_HBP(num_val);
 281        } else if (!strncmp(setting, "right:", 6)) {
 282                num_val = simple_strtoul(setting + 6, &setting, 0);
 283                panel_cfg.timing_h |= DSS_HFP(num_val);
 284        } else if (!strncmp(setting, "upper:", 6)) {
 285                num_val = simple_strtoul(setting + 6, &setting, 0);
 286                panel_cfg.timing_v |= DSS_VBP(num_val);
 287        } else if (!strncmp(setting, "lower:", 6)) {
 288                num_val = simple_strtoul(setting + 6, &setting, 0);
 289                panel_cfg.timing_v |= DSS_VFP(num_val);
 290        } else if (!strncmp(setting, "hsynclen:", 9)) {
 291                num_val = simple_strtoul(setting + 9, &setting, 0);
 292                panel_cfg.timing_h |= DSS_HSW(num_val);
 293        } else if (!strncmp(setting, "vsynclen:", 9)) {
 294                num_val = simple_strtoul(setting + 9, &setting, 0);
 295                panel_cfg.timing_v |= DSS_VSW(num_val);
 296        } else if (!strncmp(setting, "hsync:", 6)) {
 297                if (simple_strtoul(setting + 6, &setting, 0) == 0)
 298                        panel_cfg.pol_freq |= DSS_IHS;
 299                else
 300                        panel_cfg.pol_freq &= ~DSS_IHS;
 301        } else if (!strncmp(setting, "vsync:", 6)) {
 302                if (simple_strtoul(setting + 6, &setting, 0) == 0)
 303                        panel_cfg.pol_freq |= DSS_IVS;
 304                else
 305                        panel_cfg.pol_freq &= ~DSS_IVS;
 306        } else if (!strncmp(setting, "outputen:", 9)) {
 307                if (simple_strtoul(setting + 9, &setting, 0) == 0)
 308                        panel_cfg.pol_freq |= DSS_IEO;
 309                else
 310                        panel_cfg.pol_freq &= ~DSS_IEO;
 311        } else if (!strncmp(setting, "pixclockpol:", 12)) {
 312                if (simple_strtoul(setting + 12, &setting, 0) == 0)
 313                        panel_cfg.pol_freq |= DSS_IPC;
 314                else
 315                        panel_cfg.pol_freq &= ~DSS_IPC;
 316        } else if (!strncmp(setting, "active", 6)) {
 317                panel_cfg.panel_type = ACTIVE_DISPLAY;
 318                return 0; /* Avoid sanity check below */
 319        } else if (!strncmp(setting, "passive", 7)) {
 320                panel_cfg.panel_type = PASSIVE_DISPLAY;
 321                return 0; /* Avoid sanity check below */
 322        } else if (!strncmp(setting, "display:", 8)) {
 323                if (!strncmp(setting + 8, "dvi", 3)) {
 324                        lcd_def = DVI_CUSTOM;
 325                        return 0; /* Avoid sanity check below */
 326                }
 327        } else {
 328                printf("LCD: unknown option %s\n", setting_start);
 329                return -1;
 330        }
 331
 332        if (setting[0] != '\0') {
 333                printf("LCD: invalid value for %s\n", setting_start);
 334                return -1;
 335        }
 336
 337        return 0;
 338}
 339
 340/*
 341 * env_parse_customlcd() - parse custom lcd params from an environment variable.
 342 *
 343 * @custom_lcd_params:  The environment variable containing the lcd params.
 344 *
 345 * Returns -1 on failure, 0 on success.
 346 */
 347static int parse_customlcd(char *custom_lcd_params)
 348{
 349        char params_cpy[160];
 350        char *setting;
 351
 352        strncpy(params_cpy, custom_lcd_params, 160);
 353        setting = strtok(params_cpy, ",");
 354        while (setting) {
 355                if (parse_setting(setting) < 0)
 356                        return -1;
 357
 358                setting = strtok(NULL, ",");
 359        }
 360
 361        /* Currently we don't support changing this via custom lcd params */
 362        panel_cfg.data_lines = LCD_INTERFACE_24_BIT;
 363        panel_cfg.gfx_format = GFXFORMAT_RGB16; /* See dvi predefines note */
 364
 365        return 0;
 366}
 367
 368/*
 369 * env_parse_displaytype() - parse display type.
 370 *
 371 * Parses the environment variable "displaytype", which contains the
 372 * name of the display type or preset, in which case it applies its
 373 * configurations.
 374 *
 375 * Returns the type of display that was specified.
 376 */
 377static enum display_type env_parse_displaytype(char *displaytype)
 378{
 379        if (!strncmp(displaytype, "dvi640x480", 10))
 380                return set_dvi_preset(preset_dvi_640X480, 640, 480);
 381        else if (!strncmp(displaytype, "dvi800x600", 10))
 382                return set_dvi_preset(preset_dvi_800X600, 800, 600);
 383        else if (!strncmp(displaytype, "dvi1024x768", 11))
 384                return set_dvi_preset(preset_dvi_1024X768, 1024, 768);
 385        else if (!strncmp(displaytype, "dvi1152x864", 11))
 386                return set_dvi_preset(preset_dvi_1152X864, 1152, 864);
 387        else if (!strncmp(displaytype, "dvi1280x960", 11))
 388                return set_dvi_preset(preset_dvi_1280X960, 1280, 960);
 389        else if (!strncmp(displaytype, "dvi1280x1024", 12))
 390                return set_dvi_preset(preset_dvi_1280X1024, 1280, 1024);
 391        else if (!strncmp(displaytype, "dataimage480x800", 16))
 392                return set_dataimage_preset(preset_dataimage_480X800, 480, 800);
 393
 394        return NONE;
 395}
 396
 397void lcd_ctrl_init(void *lcdbase)
 398{
 399        struct prcm *prcm = (struct prcm *)PRCM_BASE;
 400        char *custom_lcd;
 401        char *displaytype = env_get("displaytype");
 402
 403        if (displaytype == NULL)
 404                return;
 405
 406        lcd_def = env_parse_displaytype(displaytype);
 407        /* If we did not recognize the preset, check if it's an env variable */
 408        if (lcd_def == NONE) {
 409                custom_lcd = env_get(displaytype);
 410                if (custom_lcd == NULL || parse_customlcd(custom_lcd) < 0)
 411                        return;
 412        }
 413
 414        panel_cfg.frame_buffer = lcdbase;
 415        omap3_dss_panel_config(&panel_cfg);
 416        /*
 417         * Pixel clock is defined with many divisions and only few
 418         * multiplications of the system clock. Since DSS FCLK divisor is set
 419         * to 16 by default, we need to set it to a smaller value, like 3
 420         * (chosen via trial and error).
 421         */
 422        clrsetbits_le32(&prcm->clksel_dss, 0xF, 3);
 423}
 424
 425#ifdef CONFIG_SCF0403_LCD
 426static void scf0403_enable(void)
 427{
 428        gpio_direction_output(58, 1);
 429        scf0403_init(157);
 430}
 431#else
 432static inline void scf0403_enable(void) {}
 433#endif
 434
 435void lcd_enable(void)
 436{
 437        switch (lcd_def) {
 438        case NONE:
 439                return;
 440        case DVI:
 441        case DVI_CUSTOM:
 442                gpio_direction_output(54, 0); /* Turn on DVI */
 443                break;
 444        case DATA_IMAGE:
 445                scf0403_enable();
 446                break;
 447        }
 448
 449        omap3_dss_enable();
 450}
 451
 452void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue) {}
 453