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8#ifndef __CROS_EC_COMMANDS_H
9#define __CROS_EC_COMMANDS_H
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36
37#define EC_PROTO_VERSION 0x00000002
38
39
40#define EC_VER_MASK(version) (1UL << (version))
41
42
43#define EC_LPC_ADDR_ACPI_DATA 0x62
44#define EC_LPC_ADDR_ACPI_CMD 0x66
45
46
47#define EC_LPC_ADDR_HOST_DATA 0x200
48#define EC_LPC_ADDR_HOST_CMD 0x204
49
50
51
52#define EC_LPC_ADDR_HOST_ARGS 0x800
53#define EC_LPC_ADDR_HOST_PARAM 0x804
54
55
56#define EC_LPC_ADDR_HOST_PACKET 0x800
57#define EC_LPC_HOST_PACKET_SIZE 0x100
58
59
60
61#define EC_HOST_CMD_REGION0 0x800
62#define EC_HOST_CMD_REGION1 0x880
63#define EC_HOST_CMD_REGION_SIZE 0x80
64
65
66#define EC_LPC_CMDR_DATA (1 << 0)
67#define EC_LPC_CMDR_PENDING (1 << 1)
68#define EC_LPC_CMDR_BUSY (1 << 2)
69#define EC_LPC_CMDR_CMD (1 << 3)
70#define EC_LPC_CMDR_ACPI_BRST (1 << 4)
71#define EC_LPC_CMDR_SCI (1 << 5)
72#define EC_LPC_CMDR_SMI (1 << 6)
73
74
75#define MEC_EMI_BASE 0x800
76#define MEC_EMI_SIZE 8
77
78#define EC_LPC_ADDR_MEMMAP 0x900
79#define EC_MEMMAP_SIZE 255
80#define EC_MEMMAP_TEXT_MAX 8
81
82
83#define EC_MEMMAP_TEMP_SENSOR 0x00
84#define EC_MEMMAP_FAN 0x10
85#define EC_MEMMAP_TEMP_SENSOR_B 0x18
86#define EC_MEMMAP_ID 0x20
87#define EC_MEMMAP_ID_VERSION 0x22
88#define EC_MEMMAP_THERMAL_VERSION 0x23
89#define EC_MEMMAP_BATTERY_VERSION 0x24
90#define EC_MEMMAP_SWITCHES_VERSION 0x25
91#define EC_MEMMAP_EVENTS_VERSION 0x26
92#define EC_MEMMAP_HOST_CMD_FLAGS 0x27
93
94#define EC_MEMMAP_SWITCHES 0x30
95
96#define EC_MEMMAP_HOST_EVENTS 0x34
97
98
99#define EC_MEMMAP_BATT_VOLT 0x40
100#define EC_MEMMAP_BATT_RATE 0x44
101#define EC_MEMMAP_BATT_CAP 0x48
102#define EC_MEMMAP_BATT_FLAG 0x4c
103#define EC_MEMMAP_BATT_DCAP 0x50
104#define EC_MEMMAP_BATT_DVLT 0x54
105#define EC_MEMMAP_BATT_LFCC 0x58
106#define EC_MEMMAP_BATT_CCNT 0x5c
107
108#define EC_MEMMAP_BATT_MFGR 0x60
109#define EC_MEMMAP_BATT_MODEL 0x68
110#define EC_MEMMAP_BATT_SERIAL 0x70
111#define EC_MEMMAP_BATT_TYPE 0x78
112#define EC_MEMMAP_ALS 0x80
113
114#define EC_MEMMAP_ACC_STATUS 0x90
115
116#define EC_MEMMAP_ACC_DATA 0x92
117
118
119
120#define EC_MEMMAP_GYRO_DATA 0xa0
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127
128#define EC_MEMMAP_NO_ACPI 0xe0
129
130
131#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
132#define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4)
133#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7)
134
135
136#define EC_TEMP_SENSOR_ENTRIES 16
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139
140
141
142#define EC_TEMP_SENSOR_B_ENTRIES 8
143
144
145#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
146#define EC_TEMP_SENSOR_ERROR 0xfe
147#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
148#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
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153#define EC_TEMP_SENSOR_OFFSET 200
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157
158#define EC_ALS_ENTRIES 2
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164
165#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
166
167#define EC_FAN_SPEED_ENTRIES 4
168#define EC_FAN_SPEED_NOT_PRESENT 0xffff
169#define EC_FAN_SPEED_STALLED 0xfffe
170
171
172#define EC_BATT_FLAG_AC_PRESENT 0x01
173#define EC_BATT_FLAG_BATT_PRESENT 0x02
174#define EC_BATT_FLAG_DISCHARGING 0x04
175#define EC_BATT_FLAG_CHARGING 0x08
176#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
177
178
179#define EC_SWITCH_LID_OPEN 0x01
180#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
181#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
182
183#define EC_SWITCH_IGNORE1 0x08
184
185#define EC_SWITCH_DEDICATED_RECOVERY 0x10
186
187#define EC_SWITCH_IGNORE0 0x20
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189
190
191#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
192
193#define EC_HOST_CMD_FLAG_VERSION_3 0x02
194
195
196#define EC_WIRELESS_SWITCH_ALL ~0x00
197#define EC_WIRELESS_SWITCH_WLAN 0x01
198#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02
199#define EC_WIRELESS_SWITCH_WWAN 0x04
200#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08
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222#define EC_CMD_ACPI_READ 0x0080
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237#define EC_CMD_ACPI_WRITE 0x0081
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246#define EC_CMD_ACPI_BURST_ENABLE 0x0082
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254#define EC_CMD_ACPI_BURST_DISABLE 0x0083
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261
262
263#define EC_CMD_ACPI_QUERY_EVENT 0x0084
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268#define EC_ACPI_MEM_VERSION 0x00
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272
273#define EC_ACPI_MEM_TEST 0x01
274
275#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
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277
278#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
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280#define EC_ACPI_MEM_FAN_DUTY 0x04
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297#define EC_ACPI_MEM_TEMP_ID 0x05
298#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
299#define EC_ACPI_MEM_TEMP_COMMIT 0x07
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306#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
307#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
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324#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
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327#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
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329#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
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335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336#define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01
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341
342#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
343#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
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346#define EC_ACPI_MEM_VERSION_CURRENT 2
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353
354#ifndef __ACPI__
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359
360#ifndef __packed
361#define __packed __attribute__((packed))
362#endif
363
364#ifndef __aligned
365#define __aligned(x) __attribute__((aligned(x)))
366#endif
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395#ifdef CONFIG_HOSTCMD_ALIGNED
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401#define __ec_align1 __packed
402#define __ec_align2 __packed __aligned(2)
403#define __ec_align4 __packed __aligned(4)
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412
413#define __ec_align_size1 __packed
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419#define __ec_align_offset1 __packed
420#define __ec_align_offset2 __packed __aligned(2)
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429
430#define __ec_todo_packed __packed
431#define __ec_todo_unpacked
432
433#else
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437
438
439#define __ec_align1 __packed
440#define __ec_align2 __packed
441#define __ec_align4 __packed
442#define __ec_align_size1 __packed
443#define __ec_align_offset1 __packed
444#define __ec_align_offset2 __packed
445#define __ec_todo_packed __packed
446#define __ec_todo_unpacked
447
448#endif
449
450
451
452#define EC_LPC_STATUS_TO_HOST 0x01
453
454#define EC_LPC_STATUS_FROM_HOST 0x02
455
456#define EC_LPC_STATUS_PROCESSING 0x04
457
458#define EC_LPC_STATUS_LAST_CMD 0x08
459
460#define EC_LPC_STATUS_BURST_MODE 0x10
461
462#define EC_LPC_STATUS_SCI_PENDING 0x20
463
464#define EC_LPC_STATUS_SMI_PENDING 0x40
465
466#define EC_LPC_STATUS_RESERVED 0x80
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468
469
470
471
472#define EC_LPC_STATUS_BUSY_MASK \
473 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
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476
477
478enum ec_status {
479 EC_RES_SUCCESS = 0,
480 EC_RES_INVALID_COMMAND = 1,
481 EC_RES_ERROR = 2,
482 EC_RES_INVALID_PARAM = 3,
483 EC_RES_ACCESS_DENIED = 4,
484 EC_RES_INVALID_RESPONSE = 5,
485 EC_RES_INVALID_VERSION = 6,
486 EC_RES_INVALID_CHECKSUM = 7,
487 EC_RES_IN_PROGRESS = 8,
488 EC_RES_UNAVAILABLE = 9,
489 EC_RES_TIMEOUT = 10,
490 EC_RES_OVERFLOW = 11,
491 EC_RES_INVALID_HEADER = 12,
492 EC_RES_REQUEST_TRUNCATED = 13,
493 EC_RES_RESPONSE_TOO_BIG = 14,
494 EC_RES_BUS_ERROR = 15,
495 EC_RES_BUSY = 16
496};
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504
505enum host_event_code {
506 EC_HOST_EVENT_LID_CLOSED = 1,
507 EC_HOST_EVENT_LID_OPEN = 2,
508 EC_HOST_EVENT_POWER_BUTTON = 3,
509 EC_HOST_EVENT_AC_CONNECTED = 4,
510 EC_HOST_EVENT_AC_DISCONNECTED = 5,
511 EC_HOST_EVENT_BATTERY_LOW = 6,
512 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
513 EC_HOST_EVENT_BATTERY = 8,
514 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
515
516 EC_HOST_EVENT_DEVICE = 10,
517 EC_HOST_EVENT_THERMAL = 11,
518 EC_HOST_EVENT_USB_CHARGER = 12,
519 EC_HOST_EVENT_KEY_PRESSED = 13,
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525 EC_HOST_EVENT_INTERFACE_READY = 14,
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527 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
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530 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
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532 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
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535 EC_HOST_EVENT_THROTTLE_START = 18,
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537 EC_HOST_EVENT_THROTTLE_STOP = 19,
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540 EC_HOST_EVENT_HANG_DETECT = 20,
541
542 EC_HOST_EVENT_HANG_REBOOT = 21,
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545 EC_HOST_EVENT_PD_MCU = 22,
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548 EC_HOST_EVENT_BATTERY_STATUS = 23,
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551 EC_HOST_EVENT_PANIC = 24,
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554 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
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557 EC_HOST_EVENT_RTC = 26,
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560 EC_HOST_EVENT_MKBP = 27,
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563 EC_HOST_EVENT_USB_MUX = 28,
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566 EC_HOST_EVENT_MODE_CHANGE = 29,
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569 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
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575 EC_HOST_EVENT_EXTENDED = 31,
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584 EC_HOST_EVENT_INVALID = 32
585};
586
587#define EC_HOST_EVENT_MASK(event_code) (1ULL << ((event_code) - 1))
588
589
590struct __ec_align4 ec_lpc_host_args {
591 uint8_t flags;
592 uint8_t command_version;
593 uint8_t data_size;
594
595
596
597
598 uint8_t checksum;
599};
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611#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
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619#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
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661#define EC_SPI_FRAME_START 0xec
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666#define EC_SPI_PAST_END 0xed
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673#define EC_SPI_RX_READY 0xf8
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679#define EC_SPI_RECEIVING 0xf9
680
681
682#define EC_SPI_PROCESSING 0xfa
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688#define EC_SPI_RX_BAD_DATA 0xfb
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695#define EC_SPI_NOT_READY 0xfc
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701
702#define EC_SPI_OLD_READY 0xfd
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721
722#define EC_PROTO2_REQUEST_HEADER_BYTES 3
723#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
724#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
725 EC_PROTO2_REQUEST_TRAILER_BYTES)
726
727#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
728#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
729#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
730 EC_PROTO2_RESPONSE_TRAILER_BYTES)
731
732
733#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
734
735
736#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
737 EC_PROTO2_MAX_PARAM_SIZE)
738#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
739 EC_PROTO2_MAX_PARAM_SIZE)
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741
742
743
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746
747#define EC_COMMAND_PROTOCOL_3 0xda
748
749#define EC_HOST_REQUEST_VERSION 3
750
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752struct __ec_align4 ec_host_request {
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754
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758 uint8_t struct_version;
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764 uint8_t checksum;
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766
767 uint16_t command;
768
769
770 uint8_t command_version;
771
772
773 uint8_t reserved;
774
775
776 uint16_t data_len;
777};
778
779#define EC_HOST_RESPONSE_VERSION 3
780
781
782struct __ec_align4 ec_host_response {
783
784 uint8_t struct_version;
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786
787
788
789
790 uint8_t checksum;
791
792
793 uint16_t result;
794
795
796 uint16_t data_len;
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798
799 uint16_t reserved;
800};
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824#define EC_CMD_PROTO_VERSION 0x0000
825
826struct __ec_align4 ec_response_proto_version {
827 uint32_t version;
828};
829
830
831
832
833
834#define EC_CMD_HELLO 0x0001
835
836struct __ec_align4 ec_params_hello {
837 uint32_t in_data;
838};
839
840struct __ec_align4 ec_response_hello {
841 uint32_t out_data;
842};
843
844
845#define EC_CMD_GET_VERSION 0x0002
846
847enum ec_current_image {
848 EC_IMAGE_UNKNOWN = 0,
849 EC_IMAGE_RO,
850 EC_IMAGE_RW
851};
852
853struct __ec_align4 ec_response_get_version {
854
855 char version_string_ro[32];
856 char version_string_rw[32];
857 char reserved[32];
858 uint32_t current_image;
859};
860
861
862#define EC_CMD_READ_TEST 0x0003
863
864struct __ec_align4 ec_params_read_test {
865 uint32_t offset;
866 uint32_t size;
867};
868
869struct __ec_align4 ec_response_read_test {
870 uint32_t data[32];
871};
872
873
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876
877
878#define EC_CMD_GET_BUILD_INFO 0x0004
879
880
881#define EC_CMD_GET_CHIP_INFO 0x0005
882
883struct __ec_align4 ec_response_get_chip_info {
884
885 char vendor[32];
886 char name[32];
887 char revision[32];
888};
889
890
891#define EC_CMD_GET_BOARD_VERSION 0x0006
892
893struct __ec_align2 ec_response_board_version {
894 uint16_t board_version;
895};
896
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904
905#define EC_CMD_READ_MEMMAP 0x0007
906
907struct __ec_align1 ec_params_read_memmap {
908 uint8_t offset;
909 uint8_t size;
910};
911
912
913#define EC_CMD_GET_CMD_VERSIONS 0x0008
914
915struct __ec_align1 ec_params_get_cmd_versions {
916 uint8_t cmd;
917};
918
919struct __ec_align2 ec_params_get_cmd_versions_v1 {
920 uint16_t cmd;
921};
922
923struct __ec_align4 ec_response_get_cmd_versions {
924
925
926
927
928 uint32_t version_mask;
929};
930
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937
938#define EC_CMD_GET_COMMS_STATUS 0x0009
939
940
941enum ec_comms_status {
942 EC_COMMS_STATUS_PROCESSING = 1 << 0,
943};
944
945struct __ec_align4 ec_response_get_comms_status {
946 uint32_t flags;
947};
948
949
950#define EC_CMD_TEST_PROTOCOL 0x000A
951
952
953struct __ec_align4 ec_params_test_protocol {
954 uint32_t ec_result;
955 uint32_t ret_len;
956 uint8_t buf[32];
957};
958
959
960struct __ec_align4 ec_response_test_protocol {
961 uint8_t buf[32];
962};
963
964
965#define EC_CMD_GET_PROTOCOL_INFO 0x000B
966
967
968
969#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
970
971struct __ec_align4 ec_response_get_protocol_info {
972
973
974
975 uint32_t protocol_versions;
976
977
978 uint16_t max_request_packet_size;
979
980
981 uint16_t max_response_packet_size;
982
983
984 uint32_t flags;
985};
986
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990
991
992#define EC_GSV_SET 0x80000000
993
994
995
996#define EC_GSV_PARAM_MASK 0x00ffffff
997
998struct __ec_align4 ec_params_get_set_value {
999 uint32_t flags;
1000 uint32_t value;
1001};
1002
1003struct __ec_align4 ec_response_get_set_value {
1004 uint32_t flags;
1005 uint32_t value;
1006};
1007
1008
1009#define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1010
1011
1012
1013#define EC_CMD_GET_FEATURES 0x000D
1014
1015
1016enum ec_feature_code {
1017
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1020
1021 EC_FEATURE_LIMITED = 0,
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1023
1024
1025
1026 EC_FEATURE_FLASH = 1,
1027
1028
1029
1030 EC_FEATURE_PWM_FAN = 2,
1031
1032
1033
1034 EC_FEATURE_PWM_KEYB = 3,
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1036
1037
1038 EC_FEATURE_LIGHTBAR = 4,
1039
1040 EC_FEATURE_LED = 5,
1041
1042
1043
1044
1045 EC_FEATURE_MOTION_SENSE = 6,
1046
1047 EC_FEATURE_KEYB = 7,
1048
1049 EC_FEATURE_PSTORE = 8,
1050
1051 EC_FEATURE_PORT80 = 9,
1052
1053
1054
1055
1056 EC_FEATURE_THERMAL = 10,
1057
1058 EC_FEATURE_BKLIGHT_SWITCH = 11,
1059
1060 EC_FEATURE_WIFI_SWITCH = 12,
1061
1062 EC_FEATURE_HOST_EVENTS = 13,
1063
1064 EC_FEATURE_GPIO = 14,
1065
1066 EC_FEATURE_I2C = 15,
1067
1068 EC_FEATURE_CHARGER = 16,
1069
1070 EC_FEATURE_BATTERY = 17,
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1072
1073
1074
1075 EC_FEATURE_SMART_BATTERY = 18,
1076
1077 EC_FEATURE_HANG_DETECT = 19,
1078
1079 EC_FEATURE_PMU = 20,
1080
1081 EC_FEATURE_SUB_MCU = 21,
1082
1083 EC_FEATURE_USB_PD = 22,
1084
1085 EC_FEATURE_USB_MUX = 23,
1086
1087 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1088
1089 EC_FEATURE_VSTORE = 25,
1090
1091 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1092
1093 EC_FEATURE_RTC = 27,
1094
1095 EC_FEATURE_FINGERPRINT = 28,
1096
1097 EC_FEATURE_TOUCHPAD = 29,
1098
1099 EC_FEATURE_RWSIG = 30,
1100
1101 EC_FEATURE_DEVICE_EVENT = 31,
1102
1103 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1104
1105 EC_FEATURE_HOST_EVENT64 = 33,
1106
1107 EC_FEATURE_EXEC_IN_RAM = 34,
1108
1109 EC_FEATURE_CEC = 35,
1110
1111 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1112
1113
1114
1115
1116
1117 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1118
1119
1120
1121
1122
1123 EC_FEATURE_EFS2 = 38,
1124
1125 EC_FEATURE_SCP = 39,
1126
1127 EC_FEATURE_ISH = 40,
1128
1129 EC_FEATURE_TYPEC_CMD = 41,
1130
1131
1132
1133
1134 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY = 42,
1135
1136
1137
1138
1139 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
1140};
1141
1142#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1143#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1144
1145struct ec_response_get_features {
1146 uint32_t flags[2];
1147} __ec_align4;
1148
1149
1150
1151#define EC_CMD_GET_SKU_ID 0x000E
1152
1153
1154#define EC_CMD_SET_SKU_ID 0x000F
1155
1156struct __ec_align4 ec_sku_id_info {
1157 uint32_t sku_id;
1158};
1159
1160
1161
1162
1163
1164#define EC_CMD_FLASH_INFO 0x0010
1165#define EC_VER_FLASH_INFO 2
1166
1167
1168struct __ec_align4 ec_response_flash_info {
1169
1170 uint32_t flash_size;
1171
1172
1173
1174
1175 uint32_t write_block_size;
1176
1177
1178
1179
1180 uint32_t erase_block_size;
1181
1182
1183
1184
1185 uint32_t protect_block_size;
1186};
1187
1188
1189
1190#define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
1191
1192
1193
1194
1195
1196
1197#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213struct __ec_align4 ec_response_flash_info_1 {
1214
1215 uint32_t flash_size;
1216 uint32_t write_block_size;
1217 uint32_t erase_block_size;
1218 uint32_t protect_block_size;
1219
1220
1221
1222
1223
1224
1225
1226
1227 uint32_t write_ideal_size;
1228
1229
1230 uint32_t flags;
1231};
1232
1233struct __ec_align4 ec_params_flash_info_2 {
1234
1235 uint16_t num_banks_desc;
1236
1237 uint8_t reserved[2];
1238};
1239
1240struct ec_flash_bank {
1241
1242 uint16_t count;
1243
1244 uint8_t size_exp;
1245
1246 uint8_t write_size_exp;
1247
1248 uint8_t erase_size_exp;
1249
1250 uint8_t protect_size_exp;
1251
1252 uint8_t reserved[2];
1253};
1254
1255struct __ec_align4 ec_response_flash_info_2 {
1256
1257 uint32_t flash_size;
1258
1259 uint32_t flags;
1260
1261 uint32_t write_ideal_size;
1262
1263 uint16_t num_banks_total;
1264
1265 uint16_t num_banks_desc;
1266 struct ec_flash_bank banks[0];
1267};
1268
1269
1270
1271
1272
1273
1274#define EC_CMD_FLASH_READ 0x0011
1275
1276struct __ec_align4 ec_params_flash_read {
1277 uint32_t offset;
1278 uint32_t size;
1279};
1280
1281
1282#define EC_CMD_FLASH_WRITE 0x0012
1283#define EC_VER_FLASH_WRITE 1
1284
1285
1286#define EC_FLASH_WRITE_VER0_SIZE 64
1287
1288struct __ec_align4 ec_params_flash_write {
1289 uint32_t offset;
1290 uint32_t size;
1291
1292};
1293
1294
1295#define EC_CMD_FLASH_ERASE 0x0013
1296
1297
1298struct __ec_align4 ec_params_flash_erase {
1299 uint32_t offset;
1300 uint32_t size;
1301};
1302
1303
1304#define EC_VER_FLASH_WRITE 1
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321enum ec_flash_erase_cmd {
1322 FLASH_ERASE_SECTOR,
1323 FLASH_ERASE_SECTOR_ASYNC,
1324 FLASH_ERASE_GET_RESULT,
1325};
1326
1327struct __ec_align4 ec_params_flash_erase_v1 {
1328
1329 uint8_t cmd;
1330
1331 uint8_t reserved;
1332
1333 uint16_t flag;
1334
1335 struct ec_params_flash_erase params;
1336};
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348#define EC_CMD_FLASH_PROTECT 0x0015
1349#define EC_VER_FLASH_PROTECT 1
1350
1351
1352
1353#define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0)
1354
1355
1356
1357
1358#define EC_FLASH_PROTECT_RO_NOW (1 << 1)
1359
1360#define EC_FLASH_PROTECT_ALL_NOW (1 << 2)
1361
1362#define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3)
1363
1364#define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4)
1365
1366
1367
1368
1369
1370#define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
1371
1372#define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6)
1373
1374#define EC_FLASH_PROTECT_RW_AT_BOOT (1 << 7)
1375
1376#define EC_FLASH_PROTECT_RW_NOW (1 << 8)
1377
1378#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT (1 << 9)
1379
1380#define EC_FLASH_PROTECT_ROLLBACK_NOW (1 << 10)
1381
1382struct __ec_align4 ec_params_flash_protect {
1383 uint32_t mask;
1384 uint32_t flags;
1385};
1386
1387struct __ec_align4 ec_response_flash_protect {
1388
1389 uint32_t flags;
1390
1391
1392
1393
1394
1395 uint32_t valid_flags;
1396
1397 uint32_t writable_flags;
1398};
1399
1400
1401
1402
1403
1404
1405
1406#define EC_CMD_FLASH_REGION_INFO 0x0016
1407#define EC_VER_FLASH_REGION_INFO 1
1408
1409enum ec_flash_region {
1410
1411 EC_FLASH_REGION_RO = 0,
1412
1413 EC_FLASH_REGION_ACTIVE,
1414
1415
1416
1417
1418 EC_FLASH_REGION_WP_RO,
1419
1420 EC_FLASH_REGION_UPDATE,
1421
1422 EC_FLASH_REGION_COUNT,
1423};
1424
1425struct __ec_align4 ec_params_flash_region_info {
1426 uint32_t region;
1427};
1428
1429struct __ec_align4 ec_response_flash_region_info {
1430 uint32_t offset;
1431 uint32_t size;
1432};
1433
1434
1435#define EC_CMD_VBNV_CONTEXT 0x0017
1436#define EC_VER_VBNV_CONTEXT 1
1437#define EC_VBNV_BLOCK_SIZE 16
1438#define EC_VBNV_BLOCK_SIZE_V2 64
1439
1440enum ec_vbnvcontext_op {
1441 EC_VBNV_CONTEXT_OP_READ,
1442 EC_VBNV_CONTEXT_OP_WRITE,
1443};
1444
1445struct __ec_align4 ec_params_vbnvcontext {
1446 uint32_t op;
1447 uint8_t block[EC_VBNV_BLOCK_SIZE_V2];
1448};
1449
1450struct __ec_align4 ec_response_vbnvcontext {
1451 uint8_t block[EC_VBNV_BLOCK_SIZE_V2];
1452};
1453
1454
1455
1456#define EC_CMD_FLASH_SPI_INFO 0x0018
1457
1458struct __ec_align1 ec_response_flash_spi_info {
1459
1460 uint8_t jedec[3];
1461
1462
1463 uint8_t reserved0;
1464
1465
1466 uint8_t mfr_dev_id[2];
1467
1468
1469 uint8_t sr1, sr2;
1470};
1471
1472
1473
1474#define EC_CMD_FLASH_SELECT 0x0019
1475
1476struct __ec_align4 ec_params_flash_select {
1477
1478 uint8_t select;
1479};
1480
1481
1482
1483
1484
1485#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1486
1487struct __ec_align4 ec_response_pwm_get_fan_rpm {
1488 uint32_t rpm;
1489};
1490
1491
1492#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1493
1494
1495struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 {
1496 uint32_t rpm;
1497};
1498
1499
1500struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 {
1501 uint32_t rpm;
1502 uint8_t fan_idx;
1503};
1504
1505
1506
1507#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1508
1509struct __ec_align1 ec_response_pwm_get_keyboard_backlight {
1510 uint8_t percent;
1511 uint8_t enabled;
1512};
1513
1514
1515
1516#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1517
1518struct __ec_align1 ec_params_pwm_set_keyboard_backlight {
1519 uint8_t percent;
1520};
1521
1522
1523#define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1524
1525
1526struct __ec_align4 ec_params_pwm_set_fan_duty_v0 {
1527 uint32_t percent;
1528};
1529
1530
1531struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 {
1532 uint32_t percent;
1533 uint8_t fan_idx;
1534};
1535
1536#define EC_CMD_PWM_SET_DUTY 0x0025
1537
1538#define EC_PWM_MAX_DUTY 0xffff
1539
1540enum ec_pwm_type {
1541
1542 EC_PWM_TYPE_GENERIC = 0,
1543
1544 EC_PWM_TYPE_KB_LIGHT,
1545
1546 EC_PWM_TYPE_DISPLAY_LIGHT,
1547 EC_PWM_TYPE_COUNT,
1548};
1549
1550struct __ec_align4 ec_params_pwm_set_duty {
1551 uint16_t duty;
1552 uint8_t pwm_type;
1553 uint8_t index;
1554};
1555
1556#define EC_CMD_PWM_GET_DUTY 0x0026
1557
1558struct __ec_align1 ec_params_pwm_get_duty {
1559 uint8_t pwm_type;
1560 uint8_t index;
1561};
1562
1563struct __ec_align2 ec_response_pwm_get_duty {
1564 uint16_t duty;
1565};
1566
1567
1568
1569
1570
1571
1572
1573
1574#define EC_CMD_LIGHTBAR_CMD 0x0028
1575
1576struct __ec_todo_unpacked rgb_s {
1577 uint8_t r, g, b;
1578};
1579
1580#define LB_BATTERY_LEVELS 4
1581
1582
1583
1584struct __ec_todo_packed lightbar_params_v0 {
1585
1586 int32_t google_ramp_up;
1587 int32_t google_ramp_down;
1588 int32_t s3s0_ramp_up;
1589 int32_t s0_tick_delay[2];
1590 int32_t s0a_tick_delay[2];
1591 int32_t s0s3_ramp_down;
1592 int32_t s3_sleep_for;
1593 int32_t s3_ramp_up;
1594 int32_t s3_ramp_down;
1595
1596
1597 uint8_t new_s0;
1598 uint8_t osc_min[2];
1599 uint8_t osc_max[2];
1600 uint8_t w_ofs[2];
1601
1602
1603 uint8_t bright_bl_off_fixed[2];
1604 uint8_t bright_bl_on_min[2];
1605 uint8_t bright_bl_on_max[2];
1606
1607
1608 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1609
1610
1611 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1612 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1613
1614
1615 struct rgb_s color[8];
1616};
1617
1618struct __ec_todo_packed lightbar_params_v1 {
1619
1620 int32_t google_ramp_up;
1621 int32_t google_ramp_down;
1622 int32_t s3s0_ramp_up;
1623 int32_t s0_tick_delay[2];
1624 int32_t s0a_tick_delay[2];
1625 int32_t s0s3_ramp_down;
1626 int32_t s3_sleep_for;
1627 int32_t s3_ramp_up;
1628 int32_t s3_ramp_down;
1629 int32_t s5_ramp_up;
1630 int32_t s5_ramp_down;
1631 int32_t tap_tick_delay;
1632 int32_t tap_gate_delay;
1633 int32_t tap_display_time;
1634
1635
1636 uint8_t tap_pct_red;
1637 uint8_t tap_pct_green;
1638 uint8_t tap_seg_min_on;
1639 uint8_t tap_seg_max_on;
1640 uint8_t tap_seg_osc;
1641 uint8_t tap_idx[3];
1642
1643
1644 uint8_t osc_min[2];
1645 uint8_t osc_max[2];
1646 uint8_t w_ofs[2];
1647
1648
1649 uint8_t bright_bl_off_fixed[2];
1650 uint8_t bright_bl_on_min[2];
1651 uint8_t bright_bl_on_max[2];
1652
1653
1654 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1655
1656
1657 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1658 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1659
1660
1661 uint8_t s5_idx;
1662
1663
1664 struct rgb_s color[8];
1665};
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676struct __ec_todo_packed lightbar_params_v2_timing {
1677
1678 int32_t google_ramp_up;
1679 int32_t google_ramp_down;
1680 int32_t s3s0_ramp_up;
1681 int32_t s0_tick_delay[2];
1682 int32_t s0a_tick_delay[2];
1683 int32_t s0s3_ramp_down;
1684 int32_t s3_sleep_for;
1685 int32_t s3_ramp_up;
1686 int32_t s3_ramp_down;
1687 int32_t s5_ramp_up;
1688 int32_t s5_ramp_down;
1689 int32_t tap_tick_delay;
1690 int32_t tap_gate_delay;
1691 int32_t tap_display_time;
1692};
1693
1694struct __ec_todo_packed lightbar_params_v2_tap {
1695
1696 uint8_t tap_pct_red;
1697 uint8_t tap_pct_green;
1698 uint8_t tap_seg_min_on;
1699 uint8_t tap_seg_max_on;
1700 uint8_t tap_seg_osc;
1701 uint8_t tap_idx[3];
1702};
1703
1704struct __ec_todo_packed lightbar_params_v2_oscillation {
1705
1706 uint8_t osc_min[2];
1707 uint8_t osc_max[2];
1708 uint8_t w_ofs[2];
1709};
1710
1711struct __ec_todo_packed lightbar_params_v2_brightness {
1712
1713 uint8_t bright_bl_off_fixed[2];
1714 uint8_t bright_bl_on_min[2];
1715 uint8_t bright_bl_on_max[2];
1716};
1717
1718struct __ec_todo_packed lightbar_params_v2_thresholds {
1719
1720 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1721};
1722
1723struct __ec_todo_packed lightbar_params_v2_colors {
1724
1725 uint8_t s0_idx[2][LB_BATTERY_LEVELS];
1726 uint8_t s3_idx[2][LB_BATTERY_LEVELS];
1727
1728
1729 uint8_t s5_idx;
1730
1731
1732 struct rgb_s color[8];
1733};
1734
1735
1736#define EC_LB_PROG_LEN 192
1737struct __ec_todo_unpacked lightbar_program {
1738 uint8_t size;
1739 uint8_t data[EC_LB_PROG_LEN];
1740};
1741
1742struct __ec_todo_packed ec_params_lightbar {
1743 uint8_t cmd;
1744 union {
1745 struct __ec_todo_unpacked {
1746
1747 } dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1748 version, get_brightness, get_demo, suspend, resume,
1749 get_params_v2_timing, get_params_v2_tap,
1750 get_params_v2_osc, get_params_v2_bright,
1751 get_params_v2_thlds, get_params_v2_colors;
1752
1753 struct __ec_todo_unpacked {
1754 uint8_t num;
1755 } set_brightness, seq, demo;
1756
1757 struct __ec_todo_unpacked {
1758 uint8_t ctrl, reg, value;
1759 } reg;
1760
1761 struct __ec_todo_unpacked {
1762 uint8_t led, red, green, blue;
1763 } set_rgb;
1764
1765 struct __ec_todo_unpacked {
1766 uint8_t led;
1767 } get_rgb;
1768
1769 struct __ec_todo_unpacked {
1770 uint8_t enable;
1771 } manual_suspend_ctrl;
1772
1773 struct lightbar_params_v0 set_params_v0;
1774 struct lightbar_params_v1 set_params_v1;
1775
1776 struct lightbar_params_v2_timing set_v2par_timing;
1777 struct lightbar_params_v2_tap set_v2par_tap;
1778 struct lightbar_params_v2_oscillation set_v2par_osc;
1779 struct lightbar_params_v2_brightness set_v2par_bright;
1780 struct lightbar_params_v2_thresholds set_v2par_thlds;
1781 struct lightbar_params_v2_colors set_v2par_colors;
1782
1783 struct lightbar_program set_program;
1784 };
1785};
1786
1787struct __ec_todo_packed ec_response_lightbar {
1788 union {
1789 struct __ec_todo_unpacked {
1790 struct __ec_todo_unpacked {
1791 uint8_t reg;
1792 uint8_t ic0;
1793 uint8_t ic1;
1794 } vals[23];
1795 } dump;
1796
1797 struct __ec_todo_unpacked {
1798 uint8_t num;
1799 } get_seq, get_brightness, get_demo;
1800
1801 struct lightbar_params_v0 get_params_v0;
1802 struct lightbar_params_v1 get_params_v1;
1803
1804
1805 struct lightbar_params_v2_timing get_params_v2_timing;
1806 struct lightbar_params_v2_tap get_params_v2_tap;
1807 struct lightbar_params_v2_oscillation get_params_v2_osc;
1808 struct lightbar_params_v2_brightness get_params_v2_bright;
1809 struct lightbar_params_v2_thresholds get_params_v2_thlds;
1810 struct lightbar_params_v2_colors get_params_v2_colors;
1811
1812 struct __ec_todo_unpacked {
1813 uint32_t num;
1814 uint32_t flags;
1815 } version;
1816
1817 struct __ec_todo_unpacked {
1818 uint8_t red, green, blue;
1819 } get_rgb;
1820
1821 struct __ec_todo_unpacked {
1822
1823 } off, on, init, set_brightness, seq, reg, set_rgb,
1824 demo, set_params_v0, set_params_v1,
1825 set_program, manual_suspend_ctrl, suspend, resume,
1826 set_v2par_timing, set_v2par_tap,
1827 set_v2par_osc, set_v2par_bright, set_v2par_thlds,
1828 set_v2par_colors;
1829 };
1830};
1831
1832
1833enum lightbar_command {
1834 LIGHTBAR_CMD_DUMP = 0,
1835 LIGHTBAR_CMD_OFF = 1,
1836 LIGHTBAR_CMD_ON = 2,
1837 LIGHTBAR_CMD_INIT = 3,
1838 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
1839 LIGHTBAR_CMD_SEQ = 5,
1840 LIGHTBAR_CMD_REG = 6,
1841 LIGHTBAR_CMD_SET_RGB = 7,
1842 LIGHTBAR_CMD_GET_SEQ = 8,
1843 LIGHTBAR_CMD_DEMO = 9,
1844 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
1845 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
1846 LIGHTBAR_CMD_VERSION = 12,
1847 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
1848 LIGHTBAR_CMD_GET_RGB = 14,
1849 LIGHTBAR_CMD_GET_DEMO = 15,
1850 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
1851 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
1852 LIGHTBAR_CMD_SET_PROGRAM = 18,
1853 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
1854 LIGHTBAR_CMD_SUSPEND = 20,
1855 LIGHTBAR_CMD_RESUME = 21,
1856 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
1857 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
1858 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
1859 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
1860 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
1861 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
1862 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
1863 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
1864 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
1865 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
1866 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
1867 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
1868 LIGHTBAR_NUM_CMDS
1869};
1870
1871
1872
1873
1874#define EC_CMD_LED_CONTROL 0x0029
1875
1876enum ec_led_id {
1877
1878 EC_LED_ID_BATTERY_LED = 0,
1879
1880
1881
1882
1883 EC_LED_ID_POWER_LED,
1884
1885 EC_LED_ID_ADAPTER_LED,
1886
1887 EC_LED_ID_LEFT_LED,
1888
1889 EC_LED_ID_RIGHT_LED,
1890
1891 EC_LED_ID_RECOVERY_HW_REINIT_LED,
1892
1893 EC_LED_ID_SYSRQ_DEBUG_LED,
1894
1895 EC_LED_ID_COUNT
1896};
1897
1898
1899#define EC_LED_FLAGS_QUERY (1 << 0)
1900#define EC_LED_FLAGS_AUTO (1 << 1)
1901
1902enum ec_led_colors {
1903 EC_LED_COLOR_RED = 0,
1904 EC_LED_COLOR_GREEN,
1905 EC_LED_COLOR_BLUE,
1906 EC_LED_COLOR_YELLOW,
1907 EC_LED_COLOR_WHITE,
1908 EC_LED_COLOR_AMBER,
1909
1910 EC_LED_COLOR_COUNT
1911};
1912
1913struct __ec_align1 ec_params_led_control {
1914 uint8_t led_id;
1915 uint8_t flags;
1916
1917 uint8_t brightness[EC_LED_COLOR_COUNT];
1918};
1919
1920struct __ec_align1 ec_response_led_control {
1921
1922
1923
1924
1925
1926
1927
1928 uint8_t brightness_range[EC_LED_COLOR_COUNT];
1929};
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940#define EC_CMD_VBOOT_HASH 0x002A
1941
1942struct __ec_align4 ec_params_vboot_hash {
1943 uint8_t cmd;
1944 uint8_t hash_type;
1945 uint8_t nonce_size;
1946 uint8_t reserved0;
1947 uint32_t offset;
1948 uint32_t size;
1949 uint8_t nonce_data[64];
1950};
1951
1952struct __ec_align4 ec_response_vboot_hash {
1953 uint8_t status;
1954 uint8_t hash_type;
1955 uint8_t digest_size;
1956 uint8_t reserved0;
1957 uint32_t offset;
1958 uint32_t size;
1959 uint8_t hash_digest[64];
1960};
1961
1962enum ec_vboot_hash_cmd {
1963 EC_VBOOT_HASH_GET = 0,
1964 EC_VBOOT_HASH_ABORT = 1,
1965 EC_VBOOT_HASH_START = 2,
1966 EC_VBOOT_HASH_RECALC = 3,
1967};
1968
1969enum ec_vboot_hash_type {
1970 EC_VBOOT_HASH_TYPE_SHA256 = 0,
1971};
1972
1973enum ec_vboot_hash_status {
1974 EC_VBOOT_HASH_STATUS_NONE = 0,
1975 EC_VBOOT_HASH_STATUS_DONE = 1,
1976 EC_VBOOT_HASH_STATUS_BUSY = 2,
1977};
1978
1979
1980
1981
1982
1983
1984#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
1985#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
1986#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
1987
1988
1989
1990
1991
1992
1993#define EC_CMD_MOTION_SENSE_CMD 0x002B
1994
1995
1996enum motionsense_command {
1997
1998
1999
2000
2001 MOTIONSENSE_CMD_DUMP = 0,
2002
2003
2004
2005
2006
2007
2008 MOTIONSENSE_CMD_INFO = 1,
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020 MOTIONSENSE_CMD_EC_RATE = 2,
2021
2022
2023
2024
2025
2026 MOTIONSENSE_CMD_SENSOR_ODR = 3,
2027
2028
2029
2030
2031
2032 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2033
2034
2035
2036
2037
2038
2039
2040
2041 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2042
2043
2044
2045
2046 MOTIONSENSE_CMD_DATA = 6,
2047
2048
2049
2050
2051 MOTIONSENSE_CMD_FIFO_INFO = 7,
2052
2053
2054
2055
2056
2057 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2058
2059
2060
2061
2062 MOTIONSENSE_CMD_FIFO_READ = 9,
2063
2064
2065
2066
2067
2068 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2069
2070
2071
2072
2073
2074
2075
2076 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2077
2078
2079
2080
2081
2082 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2083
2084
2085
2086
2087
2088 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2089
2090
2091
2092
2093 MOTIONSENSE_CMD_LID_ANGLE = 14,
2094
2095
2096
2097
2098
2099
2100 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2101
2102
2103
2104
2105
2106 MOTIONSENSE_CMD_SPOOF = 16,
2107
2108
2109 MOTIONSENSE_NUM_CMDS
2110};
2111
2112
2113enum motionsensor_type {
2114 MOTIONSENSE_TYPE_ACCEL = 0,
2115 MOTIONSENSE_TYPE_GYRO = 1,
2116 MOTIONSENSE_TYPE_MAG = 2,
2117 MOTIONSENSE_TYPE_PROX = 3,
2118 MOTIONSENSE_TYPE_LIGHT = 4,
2119 MOTIONSENSE_TYPE_ACTIVITY = 5,
2120 MOTIONSENSE_TYPE_BARO = 6,
2121 MOTIONSENSE_TYPE_MAX,
2122};
2123
2124
2125enum motionsensor_location {
2126 MOTIONSENSE_LOC_BASE = 0,
2127 MOTIONSENSE_LOC_LID = 1,
2128 MOTIONSENSE_LOC_MAX,
2129};
2130
2131
2132enum motionsensor_chip {
2133 MOTIONSENSE_CHIP_KXCJ9 = 0,
2134 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2135 MOTIONSENSE_CHIP_BMI160 = 2,
2136 MOTIONSENSE_CHIP_SI1141 = 3,
2137 MOTIONSENSE_CHIP_SI1142 = 4,
2138 MOTIONSENSE_CHIP_SI1143 = 5,
2139 MOTIONSENSE_CHIP_KX022 = 6,
2140 MOTIONSENSE_CHIP_L3GD20H = 7,
2141 MOTIONSENSE_CHIP_BMA255 = 8,
2142 MOTIONSENSE_CHIP_BMP280 = 9,
2143 MOTIONSENSE_CHIP_OPT3001 = 10,
2144};
2145
2146struct __ec_todo_packed ec_response_motion_sensor_data {
2147
2148 uint8_t flags;
2149
2150 uint8_t sensor_num;
2151
2152 union {
2153 int16_t data[3];
2154 struct __ec_todo_packed {
2155 uint16_t reserved;
2156 uint32_t timestamp;
2157 };
2158 struct __ec_todo_unpacked {
2159 uint8_t activity;
2160 uint8_t state;
2161 int16_t add_info[2];
2162 };
2163 };
2164};
2165
2166
2167struct __ec_todo_packed ec_response_motion_sense_fifo_info {
2168
2169 uint16_t size;
2170
2171 uint16_t count;
2172
2173 uint32_t timestamp;
2174
2175 uint16_t total_lost;
2176
2177 uint16_t lost[0];
2178};
2179
2180struct __ec_todo_packed ec_response_motion_sense_fifo_data {
2181 uint32_t number_data;
2182 struct ec_response_motion_sensor_data data[0];
2183};
2184
2185
2186enum motionsensor_activity {
2187 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2188 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2189 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2190};
2191
2192struct __ec_todo_unpacked ec_motion_sense_activity {
2193 uint8_t sensor_num;
2194 uint8_t activity;
2195 uint8_t enable;
2196 uint8_t reserved;
2197 uint16_t parameters[3];
2198};
2199
2200
2201#define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
2202
2203
2204#define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
2205
2206
2207
2208
2209
2210#define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0)
2211#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1)
2212#define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2)
2213#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3)
2214
2215
2216
2217
2218
2219
2220#define EC_MOTION_SENSE_NO_VALUE -1
2221
2222#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2223
2224
2225
2226#define MOTION_SENSE_SET_OFFSET 1
2227
2228#define LID_ANGLE_UNRELIABLE 500
2229
2230enum motionsense_spoof_mode {
2231
2232 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2233
2234
2235 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2236
2237
2238 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2239
2240
2241 MOTIONSENSE_SPOOF_MODE_QUERY,
2242};
2243
2244struct __ec_todo_packed ec_params_motion_sense {
2245 uint8_t cmd;
2246 union {
2247
2248 struct __ec_todo_unpacked {
2249
2250
2251
2252
2253
2254 uint8_t max_sensor_count;
2255 } dump;
2256
2257
2258
2259
2260 struct __ec_todo_unpacked {
2261
2262
2263
2264 int16_t data;
2265 } kb_wake_angle;
2266
2267
2268
2269 struct __ec_todo_unpacked {
2270 uint8_t sensor_num;
2271 } info, info_3, data, fifo_flush, perform_calib,
2272 list_activities;
2273
2274
2275
2276
2277
2278 struct __ec_todo_unpacked {
2279 uint8_t sensor_num;
2280
2281
2282 uint8_t roundup;
2283
2284 uint16_t reserved;
2285
2286
2287 int32_t data;
2288 } ec_rate, sensor_odr, sensor_range;
2289
2290
2291 struct __ec_todo_packed {
2292 uint8_t sensor_num;
2293
2294
2295
2296
2297
2298
2299 uint16_t flags;
2300
2301
2302
2303
2304
2305
2306
2307 int16_t temp;
2308
2309
2310
2311
2312
2313
2314
2315
2316 int16_t offset[3];
2317 } sensor_offset;
2318
2319
2320 struct __ec_todo_unpacked {
2321 } fifo_info;
2322
2323
2324 struct __ec_todo_unpacked {
2325
2326
2327
2328
2329 uint32_t max_data_vector;
2330 } fifo_read;
2331
2332 struct ec_motion_sense_activity set_activity;
2333
2334
2335 struct __ec_todo_unpacked {
2336 } lid_angle;
2337
2338
2339 struct __ec_todo_unpacked {
2340
2341
2342
2343
2344 int8_t enable;
2345 } fifo_int_enable;
2346
2347
2348 struct __ec_todo_packed {
2349 uint8_t sensor_id;
2350
2351
2352 uint8_t spoof_enable;
2353
2354
2355 uint8_t reserved;
2356
2357
2358 int16_t components[3];
2359 } spoof;
2360 };
2361};
2362
2363struct __ec_todo_packed ec_response_motion_sense {
2364 union {
2365
2366 struct __ec_todo_unpacked {
2367
2368 uint8_t module_flags;
2369
2370
2371 uint8_t sensor_count;
2372
2373
2374
2375
2376
2377 struct ec_response_motion_sensor_data sensor[0];
2378 } dump;
2379
2380
2381 struct __ec_todo_unpacked {
2382
2383 uint8_t type;
2384
2385
2386 uint8_t location;
2387
2388
2389 uint8_t chip;
2390 } info;
2391
2392
2393 struct __ec_todo_unpacked {
2394
2395 uint8_t type;
2396
2397
2398 uint8_t location;
2399
2400
2401 uint8_t chip;
2402
2403
2404 uint32_t min_frequency;
2405
2406
2407 uint32_t max_frequency;
2408
2409
2410 uint32_t fifo_max_event_count;
2411 } info_3;
2412
2413
2414 struct ec_response_motion_sensor_data data;
2415
2416
2417
2418
2419
2420
2421
2422
2423 struct __ec_todo_unpacked {
2424
2425 int32_t ret;
2426 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2427 fifo_int_enable, spoof;
2428
2429
2430 struct __ec_todo_unpacked {
2431 int16_t temp;
2432 int16_t offset[3];
2433 } sensor_offset, perform_calib;
2434
2435 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2436
2437 struct ec_response_motion_sense_fifo_data fifo_read;
2438
2439 struct __ec_todo_packed {
2440 uint16_t reserved;
2441 uint32_t enabled;
2442 uint32_t disabled;
2443 } list_activities;
2444
2445 struct __ec_todo_unpacked {
2446 } set_activity;
2447
2448
2449 struct __ec_todo_unpacked {
2450
2451
2452
2453
2454 uint16_t value;
2455 } lid_angle;
2456 };
2457};
2458
2459
2460
2461
2462
2463#define EC_CMD_FORCE_LID_OPEN 0x002C
2464
2465struct __ec_align1 ec_params_force_lid_open {
2466 uint8_t enabled;
2467};
2468
2469
2470
2471#define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2472
2473enum ec_config_power_button_flags {
2474
2475 EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0),
2476};
2477
2478struct __ec_align1 ec_params_config_power_button {
2479
2480 uint8_t flags;
2481};
2482
2483
2484
2485
2486
2487#define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2488
2489struct __ec_align1 ec_params_usb_charge_set_mode {
2490 uint8_t usb_port_id;
2491 uint8_t mode;
2492};
2493
2494
2495
2496
2497
2498#define EC_PSTORE_SIZE_MAX 64
2499
2500
2501#define EC_CMD_PSTORE_INFO 0x0040
2502
2503struct __ec_align4 ec_response_pstore_info {
2504
2505 uint32_t pstore_size;
2506
2507 uint32_t access_size;
2508};
2509
2510
2511
2512
2513
2514
2515#define EC_CMD_PSTORE_READ 0x0041
2516
2517struct __ec_align4 ec_params_pstore_read {
2518 uint32_t offset;
2519 uint32_t size;
2520};
2521
2522
2523#define EC_CMD_PSTORE_WRITE 0x0042
2524
2525struct __ec_align4 ec_params_pstore_write {
2526 uint32_t offset;
2527 uint32_t size;
2528 uint8_t data[EC_PSTORE_SIZE_MAX];
2529};
2530
2531
2532
2533
2534
2535struct __ec_align4 ec_params_rtc {
2536 uint32_t time;
2537};
2538
2539struct __ec_align4 ec_response_rtc {
2540 uint32_t time;
2541};
2542
2543
2544#define EC_CMD_RTC_GET_VALUE 0x0044
2545#define EC_CMD_RTC_GET_ALARM 0x0045
2546
2547
2548#define EC_CMD_RTC_SET_VALUE 0x0046
2549#define EC_CMD_RTC_SET_ALARM 0x0047
2550
2551
2552#define EC_RTC_ALARM_CLEAR 0
2553
2554
2555
2556
2557
2558#define EC_PORT80_SIZE_MAX 32
2559
2560
2561#define EC_CMD_PORT80_LAST_BOOT 0x0048
2562#define EC_CMD_PORT80_READ 0x0048
2563
2564enum ec_port80_subcmd {
2565 EC_PORT80_GET_INFO = 0,
2566 EC_PORT80_READ_BUFFER,
2567};
2568
2569struct __ec_todo_packed ec_params_port80_read {
2570 uint16_t subcmd;
2571 union {
2572 struct __ec_todo_unpacked {
2573 uint32_t offset;
2574 uint32_t num_entries;
2575 } read_buffer;
2576 };
2577};
2578
2579struct __ec_todo_packed ec_response_port80_read {
2580 union {
2581 struct __ec_todo_unpacked {
2582 uint32_t writes;
2583 uint32_t history_size;
2584 uint32_t last_boot;
2585 } get_info;
2586 struct __ec_todo_unpacked {
2587 uint16_t codes[EC_PORT80_SIZE_MAX];
2588 } data;
2589 };
2590};
2591
2592struct __ec_align2 ec_response_port80_last_boot {
2593 uint16_t code;
2594};
2595
2596
2597
2598
2599
2600#define EC_VSTORE_SLOT_SIZE 64
2601
2602
2603#define EC_VSTORE_SLOT_MAX 32
2604
2605
2606#define EC_CMD_VSTORE_INFO 0x0049
2607struct __ec_align_size1 ec_response_vstore_info {
2608
2609 uint32_t slot_locked;
2610
2611 uint8_t slot_count;
2612};
2613
2614
2615
2616
2617
2618
2619#define EC_CMD_VSTORE_READ 0x004A
2620
2621struct __ec_align1 ec_params_vstore_read {
2622 uint8_t slot;
2623};
2624
2625struct __ec_align1 ec_response_vstore_read {
2626 uint8_t data[EC_VSTORE_SLOT_SIZE];
2627};
2628
2629
2630
2631
2632#define EC_CMD_VSTORE_WRITE 0x004B
2633
2634struct __ec_align1 ec_params_vstore_write {
2635 uint8_t slot;
2636 uint8_t data[EC_VSTORE_SLOT_SIZE];
2637};
2638
2639
2640
2641
2642
2643
2644
2645
2646#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2647#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2648
2649
2650
2651
2652
2653
2654struct __ec_align2 ec_params_thermal_set_threshold {
2655 uint8_t sensor_type;
2656 uint8_t threshold_id;
2657 uint16_t value;
2658};
2659
2660
2661struct __ec_align1 ec_params_thermal_get_threshold {
2662 uint8_t sensor_type;
2663 uint8_t threshold_id;
2664};
2665
2666struct __ec_align2 ec_response_thermal_get_threshold {
2667 uint16_t value;
2668};
2669
2670
2671
2672enum ec_temp_thresholds {
2673 EC_TEMP_THRESH_WARN = 0,
2674 EC_TEMP_THRESH_HIGH,
2675 EC_TEMP_THRESH_HALT,
2676
2677 EC_TEMP_THRESH_COUNT
2678};
2679
2680
2681
2682
2683
2684
2685
2686
2687struct __ec_align4 ec_thermal_config {
2688 uint32_t temp_host[EC_TEMP_THRESH_COUNT];
2689 uint32_t temp_fan_off;
2690 uint32_t temp_fan_max;
2691};
2692
2693
2694struct __ec_align4 ec_params_thermal_get_threshold_v1 {
2695 uint32_t sensor_num;
2696};
2697
2698
2699
2700
2701struct __ec_align4 ec_params_thermal_set_threshold_v1 {
2702 uint32_t sensor_num;
2703 struct ec_thermal_config cfg;
2704};
2705
2706
2707
2708
2709
2710#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
2711
2712
2713struct __ec_align1 ec_params_auto_fan_ctrl_v1 {
2714 uint8_t fan_idx;
2715};
2716
2717
2718#define EC_CMD_TMP006_GET_CALIBRATION 0x0053
2719#define EC_CMD_TMP006_SET_CALIBRATION 0x0054
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731struct __ec_align1 ec_params_tmp006_get_calibration {
2732 uint8_t index;
2733};
2734
2735
2736struct __ec_align4 ec_response_tmp006_get_calibration_v0 {
2737 float s0;
2738 float b0;
2739 float b1;
2740 float b2;
2741};
2742
2743struct __ec_align4 ec_params_tmp006_set_calibration_v0 {
2744 uint8_t index;
2745 uint8_t reserved[3];
2746 float s0;
2747 float b0;
2748 float b1;
2749 float b2;
2750};
2751
2752
2753struct __ec_align4 ec_response_tmp006_get_calibration_v1 {
2754 uint8_t algorithm;
2755 uint8_t num_params;
2756 uint8_t reserved[2];
2757 float val[0];
2758};
2759
2760struct __ec_align4 ec_params_tmp006_set_calibration_v1 {
2761 uint8_t index;
2762 uint8_t algorithm;
2763 uint8_t num_params;
2764 uint8_t reserved;
2765 float val[0];
2766};
2767
2768
2769
2770#define EC_CMD_TMP006_GET_RAW 0x0055
2771
2772struct __ec_align1 ec_params_tmp006_get_raw {
2773 uint8_t index;
2774};
2775
2776struct __ec_align4 ec_response_tmp006_get_raw {
2777 int32_t t;
2778 int32_t v;
2779};
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794#define EC_CMD_MKBP_STATE 0x0060
2795
2796
2797
2798
2799#define EC_CMD_MKBP_INFO 0x0061
2800
2801struct __ec_align_size1 ec_response_mkbp_info {
2802 uint32_t rows;
2803 uint32_t cols;
2804
2805 uint8_t reserved;
2806};
2807
2808struct __ec_align1 ec_params_mkbp_info {
2809 uint8_t info_type;
2810 uint8_t event_type;
2811};
2812
2813enum ec_mkbp_info_type {
2814
2815
2816
2817
2818
2819 EC_MKBP_INFO_KBD = 0,
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830 EC_MKBP_INFO_SUPPORTED = 1,
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849 EC_MKBP_INFO_CURRENT = 2,
2850};
2851
2852
2853#define EC_CMD_MKBP_SIMULATE_KEY 0x0062
2854
2855struct __ec_align1 ec_params_mkbp_simulate_key {
2856 uint8_t col;
2857 uint8_t row;
2858 uint8_t pressed;
2859};
2860
2861
2862#define EC_CMD_MKBP_SET_CONFIG 0x0064
2863#define EC_CMD_MKBP_GET_CONFIG 0x0065
2864
2865
2866enum mkbp_config_flags {
2867 EC_MKBP_FLAGS_ENABLE = 1,
2868};
2869
2870enum mkbp_config_valid {
2871 EC_MKBP_VALID_SCAN_PERIOD = 1 << 0,
2872 EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1,
2873 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3,
2874 EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4,
2875 EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5,
2876 EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6,
2877 EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7,
2878};
2879
2880
2881
2882
2883
2884
2885
2886struct __ec_align_size1 ec_mkbp_config {
2887 uint32_t valid_mask;
2888 uint8_t flags;
2889 uint8_t valid_flags;
2890 uint16_t scan_period_us;
2891
2892 uint32_t poll_timeout_us;
2893
2894
2895
2896
2897
2898 uint16_t min_post_scan_delay_us;
2899
2900 uint16_t output_settle_us;
2901 uint16_t debounce_down_us;
2902 uint16_t debounce_up_us;
2903
2904 uint8_t fifo_max_depth;
2905};
2906
2907struct __ec_align_size1 ec_params_mkbp_set_config {
2908 struct ec_mkbp_config config;
2909};
2910
2911struct __ec_align_size1 ec_response_mkbp_get_config {
2912 struct ec_mkbp_config config;
2913};
2914
2915
2916#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
2917
2918enum ec_keyscan_seq_cmd {
2919 EC_KEYSCAN_SEQ_STATUS = 0,
2920 EC_KEYSCAN_SEQ_CLEAR = 1,
2921 EC_KEYSCAN_SEQ_ADD = 2,
2922 EC_KEYSCAN_SEQ_START = 3,
2923 EC_KEYSCAN_SEQ_COLLECT = 4,
2924};
2925
2926enum ec_collect_flags {
2927
2928
2929
2930
2931 EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0,
2932};
2933
2934struct __ec_align1 ec_collect_item {
2935 uint8_t flags;
2936};
2937
2938struct __ec_todo_packed ec_params_keyscan_seq_ctrl {
2939 uint8_t cmd;
2940 union {
2941 struct __ec_align1 {
2942 uint8_t active;
2943 uint8_t num_items;
2944
2945 uint8_t cur_item;
2946 } status;
2947 struct __ec_todo_unpacked {
2948
2949
2950
2951
2952 uint32_t time_us;
2953 uint8_t scan[0];
2954 } add;
2955 struct __ec_align1 {
2956 uint8_t start_item;
2957 uint8_t num_items;
2958 } collect;
2959 };
2960};
2961
2962struct __ec_todo_packed ec_result_keyscan_seq_ctrl {
2963 union {
2964 struct __ec_todo_unpacked {
2965 uint8_t num_items;
2966
2967 struct ec_collect_item item[0];
2968 } collect;
2969 };
2970};
2971
2972
2973
2974
2975
2976
2977#define EC_CMD_GET_NEXT_EVENT 0x0067
2978
2979enum ec_mkbp_event {
2980
2981 EC_MKBP_EVENT_KEY_MATRIX = 0,
2982
2983
2984 EC_MKBP_EVENT_HOST_EVENT = 1,
2985
2986
2987 EC_MKBP_EVENT_SENSOR_FIFO = 2,
2988
2989
2990 EC_MKBP_EVENT_BUTTON = 3,
2991
2992
2993 EC_MKBP_EVENT_SWITCH = 4,
2994
2995
2996 EC_MKBP_EVENT_FINGERPRINT = 5,
2997
2998
2999
3000
3001
3002 EC_MKBP_EVENT_SYSRQ = 6,
3003
3004
3005 EC_MKBP_EVENT_COUNT,
3006};
3007
3008union __ec_align_offset1 ec_response_get_next_data {
3009 uint8_t key_matrix[13];
3010
3011
3012 uint32_t host_event;
3013
3014 struct __ec_todo_unpacked {
3015
3016 uint8_t reserved[3];
3017 struct ec_response_motion_sense_fifo_info info;
3018 } sensor_fifo;
3019
3020 uint32_t buttons;
3021
3022 uint32_t switches;
3023
3024 uint32_t fp_events;
3025
3026 uint32_t sysrq;
3027};
3028
3029struct __ec_align1 ec_response_get_next_event {
3030 uint8_t event_type;
3031
3032 union ec_response_get_next_data data;
3033};
3034
3035
3036
3037#define EC_MKBP_POWER_BUTTON 0
3038#define EC_MKBP_VOL_UP 1
3039#define EC_MKBP_VOL_DOWN 2
3040#define EC_MKBP_RECOVERY 3
3041
3042
3043#define EC_MKBP_LID_OPEN 0
3044#define EC_MKBP_TABLET_MODE 1
3045
3046
3047#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3048
3049struct __ec_align2 ec_response_keyboard_factory_test {
3050 uint16_t shorted;
3051};
3052
3053
3054#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3055#define EC_MKBP_FP_FINGER_DOWN (1 << 29)
3056#define EC_MKBP_FP_FINGER_UP (1 << 30)
3057#define EC_MKBP_FP_IMAGE_READY (1 << 31)
3058
3059
3060
3061
3062
3063#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3064
3065struct __ec_align1 ec_params_temp_sensor_get_info {
3066 uint8_t id;
3067};
3068
3069struct __ec_align1 ec_response_temp_sensor_get_info {
3070 char sensor_name[32];
3071 uint8_t sensor_type;
3072};
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091struct __ec_align4 ec_params_host_event_mask {
3092 uint32_t mask;
3093};
3094
3095struct __ec_align4 ec_response_host_event_mask {
3096 uint32_t mask;
3097};
3098
3099
3100#define EC_CMD_HOST_EVENT_GET_B 0x0087
3101#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3102#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3103#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3104
3105
3106#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3107#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3108#define EC_CMD_HOST_EVENT_CLEAR 0x008C
3109#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3110#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3111
3112
3113
3114
3115
3116
3117struct __ec_align4 ec_params_host_event {
3118
3119
3120 uint8_t action;
3121
3122
3123
3124
3125
3126 uint8_t mask_type;
3127
3128
3129 uint16_t reserved;
3130
3131
3132 uint64_t value;
3133};
3134
3135
3136
3137
3138
3139
3140struct __ec_align4 ec_response_host_event {
3141
3142
3143 uint64_t value;
3144};
3145
3146enum ec_host_event_action {
3147
3148
3149
3150
3151 EC_HOST_EVENT_GET,
3152
3153
3154 EC_HOST_EVENT_SET,
3155
3156
3157 EC_HOST_EVENT_CLEAR,
3158};
3159
3160enum ec_host_event_mask_type {
3161
3162
3163 EC_HOST_EVENT_MAIN,
3164
3165
3166 EC_HOST_EVENT_B,
3167
3168
3169 EC_HOST_EVENT_SCI_MASK,
3170
3171
3172 EC_HOST_EVENT_SMI_MASK,
3173
3174
3175 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3176
3177
3178 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3179
3180
3181 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3182
3183
3184 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3185
3186
3187 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3188};
3189
3190#define EC_CMD_HOST_EVENT 0x00A4
3191
3192
3193
3194
3195
3196#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3197
3198struct __ec_align1 ec_params_switch_enable_backlight {
3199 uint8_t enabled;
3200};
3201
3202
3203#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3204#define EC_VER_SWITCH_ENABLE_WIRELESS 1
3205
3206
3207struct __ec_align1 ec_params_switch_enable_wireless_v0 {
3208 uint8_t enabled;
3209};
3210
3211
3212struct __ec_align1 ec_params_switch_enable_wireless_v1 {
3213
3214 uint8_t now_flags;
3215
3216
3217 uint8_t now_mask;
3218
3219
3220
3221
3222
3223
3224 uint8_t suspend_flags;
3225
3226
3227 uint8_t suspend_mask;
3228};
3229
3230
3231struct __ec_align1 ec_response_switch_enable_wireless_v1 {
3232
3233 uint8_t now_flags;
3234
3235
3236 uint8_t suspend_flags;
3237};
3238
3239
3240
3241
3242
3243#define EC_CMD_GPIO_SET 0x0092
3244
3245struct __ec_align1 ec_params_gpio_set {
3246 char name[32];
3247 uint8_t val;
3248};
3249
3250
3251#define EC_CMD_GPIO_GET 0x0093
3252
3253
3254struct __ec_align1 ec_params_gpio_get {
3255 char name[32];
3256};
3257
3258struct __ec_align1 ec_response_gpio_get {
3259 uint8_t val;
3260};
3261
3262
3263struct __ec_align1 ec_params_gpio_get_v1 {
3264 uint8_t subcmd;
3265 union {
3266 struct __ec_align1 {
3267 char name[32];
3268 } get_value_by_name;
3269 struct __ec_align1 {
3270 uint8_t index;
3271 } get_info;
3272 };
3273};
3274
3275struct __ec_todo_packed ec_response_gpio_get_v1 {
3276 union {
3277 struct __ec_align1 {
3278 uint8_t val;
3279 } get_value_by_name, get_count;
3280 struct __ec_todo_unpacked {
3281 uint8_t val;
3282 char name[32];
3283 uint32_t flags;
3284 } get_info;
3285 };
3286};
3287
3288enum gpio_get_subcmd {
3289 EC_GPIO_GET_BY_NAME = 0,
3290 EC_GPIO_GET_COUNT = 1,
3291 EC_GPIO_GET_INFO = 2,
3292};
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305#define EC_CMD_I2C_READ 0x0094
3306
3307struct __ec_align_size1 ec_params_i2c_read {
3308 uint16_t addr;
3309 uint8_t read_size;
3310 uint8_t port;
3311 uint8_t offset;
3312};
3313
3314struct __ec_align2 ec_response_i2c_read {
3315 uint16_t data;
3316};
3317
3318
3319#define EC_CMD_I2C_WRITE 0x0095
3320
3321struct __ec_align_size1 ec_params_i2c_write {
3322 uint16_t data;
3323 uint16_t addr;
3324 uint8_t write_size;
3325 uint8_t port;
3326 uint8_t offset;
3327};
3328
3329
3330
3331
3332
3333
3334
3335#define EC_CMD_CHARGE_CONTROL 0x0096
3336#define EC_VER_CHARGE_CONTROL 1
3337
3338enum ec_charge_control_mode {
3339 CHARGE_CONTROL_NORMAL = 0,
3340 CHARGE_CONTROL_IDLE,
3341 CHARGE_CONTROL_DISCHARGE,
3342};
3343
3344struct __ec_align4 ec_params_charge_control {
3345 uint32_t mode;
3346};
3347
3348
3349
3350
3351
3352#define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366#define EC_CMD_CONSOLE_READ 0x0098
3367
3368enum ec_console_read_subcmd {
3369 CONSOLE_READ_NEXT = 0,
3370 CONSOLE_READ_RECENT
3371};
3372
3373struct __ec_align1 ec_params_console_read_v1 {
3374 uint8_t subcmd;
3375};
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386#define EC_CMD_BATTERY_CUT_OFF 0x0099
3387
3388#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0)
3389
3390struct __ec_align1 ec_params_battery_cutoff {
3391 uint8_t flags;
3392};
3393
3394
3395
3396
3397
3398
3399
3400#define EC_CMD_USB_MUX 0x009A
3401
3402struct __ec_align1 ec_params_usb_mux {
3403 uint8_t mux;
3404};
3405
3406
3407
3408
3409enum ec_ldo_state {
3410 EC_LDO_STATE_OFF = 0,
3411 EC_LDO_STATE_ON = 1,
3412};
3413
3414
3415
3416
3417#define EC_CMD_LDO_SET 0x009B
3418
3419struct __ec_align1 ec_params_ldo_set {
3420 uint8_t index;
3421 uint8_t state;
3422};
3423
3424
3425
3426
3427#define EC_CMD_LDO_GET 0x009C
3428
3429struct __ec_align1 ec_params_ldo_get {
3430 uint8_t index;
3431};
3432
3433struct __ec_align1 ec_response_ldo_get {
3434 uint8_t state;
3435};
3436
3437
3438
3439
3440
3441
3442
3443#define EC_CMD_POWER_INFO 0x009D
3444
3445struct __ec_align4 ec_response_power_info {
3446 uint32_t usb_dev_type;
3447 uint16_t voltage_ac;
3448 uint16_t voltage_system;
3449 uint16_t current_system;
3450 uint16_t usb_current_limit;
3451};
3452
3453
3454
3455
3456#define EC_CMD_I2C_PASSTHRU 0x009E
3457
3458
3459#define EC_I2C_FLAG_READ (1 << 15)
3460
3461
3462#define EC_I2C_ADDR_MASK 0x3ff
3463
3464#define EC_I2C_STATUS_NAK (1 << 0)
3465#define EC_I2C_STATUS_TIMEOUT (1 << 1)
3466
3467
3468#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3469
3470struct __ec_align2 ec_params_i2c_passthru_msg {
3471 uint16_t addr_flags;
3472 uint16_t len;
3473};
3474
3475struct __ec_align2 ec_params_i2c_passthru {
3476 uint8_t port;
3477 uint8_t num_msgs;
3478 struct ec_params_i2c_passthru_msg msg[];
3479
3480};
3481
3482struct __ec_align1 ec_response_i2c_passthru {
3483 uint8_t i2c_status;
3484 uint8_t num_msgs;
3485 uint8_t data[];
3486};
3487
3488
3489
3490
3491#define EC_CMD_HANG_DETECT 0x009F
3492
3493
3494
3495#define EC_HANG_START_ON_POWER_PRESS (1 << 0)
3496
3497
3498#define EC_HANG_START_ON_LID_CLOSE (1 << 1)
3499
3500
3501#define EC_HANG_START_ON_LID_OPEN (1 << 2)
3502
3503
3504#define EC_HANG_START_ON_RESUME (1 << 3)
3505
3506
3507
3508
3509#define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
3510
3511
3512#define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9)
3513
3514
3515#define EC_HANG_STOP_ON_SUSPEND (1 << 10)
3516
3517
3518
3519
3520
3521
3522
3523#define EC_HANG_START_NOW (1 << 30)
3524
3525
3526
3527
3528
3529
3530#define EC_HANG_STOP_NOW (1 << 31)
3531
3532struct __ec_align4 ec_params_hang_detect {
3533
3534 uint32_t flags;
3535
3536
3537 uint16_t host_event_timeout_msec;
3538
3539
3540 uint16_t warm_reboot_timeout_msec;
3541};
3542
3543
3544
3545
3546
3547
3548
3549
3550#define EC_CMD_CHARGE_STATE 0x00A0
3551
3552
3553enum charge_state_command {
3554 CHARGE_STATE_CMD_GET_STATE,
3555 CHARGE_STATE_CMD_GET_PARAM,
3556 CHARGE_STATE_CMD_SET_PARAM,
3557 CHARGE_STATE_NUM_CMDS
3558};
3559
3560
3561
3562
3563
3564enum charge_state_params {
3565 CS_PARAM_CHG_VOLTAGE,
3566 CS_PARAM_CHG_CURRENT,
3567 CS_PARAM_CHG_INPUT_CURRENT,
3568 CS_PARAM_CHG_STATUS,
3569 CS_PARAM_CHG_OPTION,
3570 CS_PARAM_LIMIT_POWER,
3571
3572
3573
3574
3575
3576 CS_NUM_BASE_PARAMS,
3577
3578
3579 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
3580 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
3581
3582
3583};
3584
3585struct __ec_todo_packed ec_params_charge_state {
3586 uint8_t cmd;
3587 union {
3588 struct __ec_align1 {
3589
3590 } get_state;
3591
3592 struct __ec_todo_unpacked {
3593 uint32_t param;
3594 } get_param;
3595
3596 struct __ec_todo_unpacked {
3597 uint32_t param;
3598 uint32_t value;
3599 } set_param;
3600 };
3601};
3602
3603struct __ec_align4 ec_response_charge_state {
3604 union {
3605 struct __ec_align4 {
3606 int ac;
3607 int chg_voltage;
3608 int chg_current;
3609 int chg_input_current;
3610 int batt_state_of_charge;
3611 } get_state;
3612
3613 struct __ec_align4 {
3614 uint32_t value;
3615 } get_param;
3616 struct __ec_align4 {
3617
3618 } set_param;
3619 };
3620};
3621
3622
3623
3624
3625
3626#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
3627
3628struct __ec_align4 ec_params_current_limit {
3629 uint32_t limit;
3630};
3631
3632
3633
3634
3635#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
3636
3637
3638struct __ec_align2 ec_params_external_power_limit_v1 {
3639 uint16_t current_lim;
3640 uint16_t voltage_lim;
3641};
3642
3643#define EC_POWER_LIMIT_NONE 0xffff
3644
3645
3646
3647
3648#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
3649
3650struct __ec_align2 ec_params_dedicated_charger_limit {
3651 uint16_t current_lim;
3652 uint16_t voltage_lim;
3653};
3654
3655
3656
3657
3658
3659#define EC_CMD_HIBERNATION_DELAY 0x00A8
3660
3661struct __ec_align4 ec_params_hibernation_delay {
3662
3663
3664
3665
3666 uint32_t seconds;
3667};
3668
3669struct __ec_align4 ec_response_hibernation_delay {
3670
3671
3672
3673
3674 uint32_t time_g3;
3675
3676
3677
3678
3679
3680 uint32_t time_remaining;
3681
3682
3683
3684
3685
3686 uint32_t hibernate_delay;
3687};
3688
3689
3690#define EC_CMD_HOST_SLEEP_EVENT 0x00A9
3691
3692enum host_sleep_event {
3693 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
3694 HOST_SLEEP_EVENT_S3_RESUME = 2,
3695 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
3696 HOST_SLEEP_EVENT_S0IX_RESUME = 4
3697};
3698
3699struct __ec_align1 ec_params_host_sleep_event {
3700 uint8_t sleep_event;
3701};
3702
3703
3704
3705#define EC_CMD_DEVICE_EVENT 0x00AA
3706
3707enum ec_device_event {
3708 EC_DEVICE_EVENT_TRACKPAD,
3709 EC_DEVICE_EVENT_DSP,
3710 EC_DEVICE_EVENT_WIFI,
3711};
3712
3713enum ec_device_event_param {
3714
3715 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
3716
3717 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
3718
3719 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
3720};
3721
3722#define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32))
3723
3724struct __ec_align_size1 ec_params_device_event {
3725 uint32_t event_mask;
3726 uint8_t param;
3727};
3728
3729struct __ec_align4 ec_response_device_event {
3730 uint32_t event_mask;
3731};
3732
3733
3734
3735
3736
3737#define EC_CMD_SB_READ_WORD 0x00B0
3738#define EC_CMD_SB_WRITE_WORD 0x00B1
3739
3740
3741
3742
3743#define EC_CMD_SB_READ_BLOCK 0x00B2
3744#define EC_CMD_SB_WRITE_BLOCK 0x00B3
3745
3746struct __ec_align1 ec_params_sb_rd {
3747 uint8_t reg;
3748};
3749
3750struct __ec_align2 ec_response_sb_rd_word {
3751 uint16_t value;
3752};
3753
3754struct __ec_align1 ec_params_sb_wr_word {
3755 uint8_t reg;
3756 uint16_t value;
3757};
3758
3759struct __ec_align1 ec_response_sb_rd_block {
3760 uint8_t data[32];
3761};
3762
3763struct __ec_align1 ec_params_sb_wr_block {
3764 uint8_t reg;
3765 uint16_t data[32];
3766};
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
3778
3779enum ec_battery_vendor_param_mode {
3780 BATTERY_VENDOR_PARAM_MODE_GET = 0,
3781 BATTERY_VENDOR_PARAM_MODE_SET,
3782};
3783
3784struct __ec_align_size1 ec_params_battery_vendor_param {
3785 uint32_t param;
3786 uint32_t value;
3787 uint8_t mode;
3788};
3789
3790struct __ec_align4 ec_response_battery_vendor_param {
3791 uint32_t value;
3792};
3793
3794
3795
3796
3797
3798#define EC_CMD_SB_FW_UPDATE 0x00B5
3799
3800enum ec_sb_fw_update_subcmd {
3801 EC_SB_FW_UPDATE_PREPARE = 0x0,
3802 EC_SB_FW_UPDATE_INFO = 0x1,
3803 EC_SB_FW_UPDATE_BEGIN = 0x2,
3804 EC_SB_FW_UPDATE_WRITE = 0x3,
3805 EC_SB_FW_UPDATE_END = 0x4,
3806 EC_SB_FW_UPDATE_STATUS = 0x5,
3807 EC_SB_FW_UPDATE_PROTECT = 0x6,
3808 EC_SB_FW_UPDATE_MAX = 0x7,
3809};
3810
3811#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
3812#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
3813#define SB_FW_UPDATE_CMD_INFO_SIZE 8
3814
3815struct __ec_align4 ec_sb_fw_update_header {
3816 uint16_t subcmd;
3817 uint16_t fw_id;
3818};
3819
3820struct __ec_align4 ec_params_sb_fw_update {
3821 struct ec_sb_fw_update_header hdr;
3822 union {
3823
3824
3825
3826
3827
3828
3829 struct __ec_align4 {
3830
3831 } dummy;
3832
3833
3834 struct __ec_align4 {
3835 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
3836 } write;
3837 };
3838};
3839
3840struct __ec_align1 ec_response_sb_fw_update {
3841 union {
3842
3843 struct __ec_align1 {
3844 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
3845 } info;
3846
3847
3848 struct __ec_align1 {
3849 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
3850 } status;
3851 };
3852};
3853
3854
3855
3856
3857
3858
3859#define EC_CMD_ENTERING_MODE 0x00B6
3860
3861struct __ec_align4 ec_params_entering_mode {
3862 int vboot_mode;
3863};
3864
3865#define VBOOT_MODE_NORMAL 0
3866#define VBOOT_MODE_DEVELOPER 1
3867#define VBOOT_MODE_RECOVERY 2
3868
3869
3870
3871
3872
3873
3874#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
3875
3876enum ec_i2c_passthru_protect_subcmd {
3877 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
3878 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
3879};
3880
3881struct __ec_align1 ec_params_i2c_passthru_protect {
3882 uint8_t subcmd;
3883 uint8_t port;
3884};
3885
3886struct __ec_align1 ec_response_i2c_passthru_protect {
3887 uint8_t status;
3888};
3889
3890
3891
3892
3893
3894
3895
3896
3897#define EC_CMD_REBOOT_EC 0x00D2
3898
3899
3900enum ec_reboot_cmd {
3901 EC_REBOOT_CANCEL = 0,
3902 EC_REBOOT_JUMP_RO = 1,
3903 EC_REBOOT_JUMP_RW = 2,
3904
3905 EC_REBOOT_COLD = 4,
3906 EC_REBOOT_DISABLE_JUMP = 5,
3907 EC_REBOOT_HIBERNATE = 6,
3908 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7,
3909};
3910
3911
3912#define EC_REBOOT_FLAG_RESERVED0 (1 << 0)
3913#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1)
3914#define EC_REBOOT_FLAG_SWITCH_RW_SLOT (1 << 2)
3915
3916struct __ec_align1 ec_params_reboot_ec {
3917 uint8_t cmd;
3918 uint8_t flags;
3919};
3920
3921
3922
3923
3924
3925
3926
3927#define EC_CMD_GET_PANIC_INFO 0x00D3
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946#define EC_CMD_REBOOT 0x00D1
3947
3948
3949
3950
3951
3952
3953
3954
3955#define EC_CMD_RESEND_RESPONSE 0x00DB
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967#define EC_CMD_VERSION0 0x00DC
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977#define EC_CMD_PD_EXCHANGE_STATUS 0x0100
3978#define EC_VER_PD_EXCHANGE_STATUS 2
3979
3980enum pd_charge_state {
3981 PD_CHARGE_NO_CHANGE = 0,
3982 PD_CHARGE_NONE,
3983 PD_CHARGE_5V,
3984 PD_CHARGE_MAX
3985};
3986
3987
3988#define EC_STATUS_HIBERNATING (1 << 0)
3989
3990struct __ec_align1 ec_params_pd_status {
3991 uint8_t status;
3992 int8_t batt_soc;
3993 uint8_t charge_state;
3994};
3995
3996
3997#define PD_STATUS_HOST_EVENT (1 << 0)
3998#define PD_STATUS_IN_RW (1 << 1)
3999#define PD_STATUS_JUMPED_TO_IMAGE (1 << 2)
4000#define PD_STATUS_TCPC_ALERT_0 (1 << 3)
4001#define PD_STATUS_TCPC_ALERT_1 (1 << 4)
4002#define PD_STATUS_TCPC_ALERT_2 (1 << 5)
4003#define PD_STATUS_TCPC_ALERT_3 (1 << 6)
4004#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
4005 PD_STATUS_TCPC_ALERT_1 | \
4006 PD_STATUS_HOST_EVENT)
4007struct __ec_align_size1 ec_response_pd_status {
4008 uint32_t curr_lim_ma;
4009 uint16_t status;
4010 int8_t active_charge_port;
4011};
4012
4013
4014#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4015
4016
4017#define PD_EVENT_UPDATE_DEVICE (1 << 0)
4018#define PD_EVENT_POWER_CHANGE (1 << 1)
4019#define PD_EVENT_IDENTITY_RECEIVED (1 << 2)
4020#define PD_EVENT_DATA_SWAP (1 << 3)
4021struct __ec_align4 ec_response_host_event_status {
4022 uint32_t status;
4023};
4024
4025
4026#define EC_CMD_USB_PD_CONTROL 0x0101
4027
4028enum usb_pd_control_role {
4029 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4030 USB_PD_CTRL_ROLE_TOGGLE_ON = 1,
4031 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4032 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4033 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4034 USB_PD_CTRL_ROLE_COUNT
4035};
4036
4037enum usb_pd_control_mux {
4038 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4039 USB_PD_CTRL_MUX_NONE = 1,
4040 USB_PD_CTRL_MUX_USB = 2,
4041 USB_PD_CTRL_MUX_DP = 3,
4042 USB_PD_CTRL_MUX_DOCK = 4,
4043 USB_PD_CTRL_MUX_AUTO = 5,
4044 USB_PD_CTRL_MUX_COUNT
4045};
4046
4047enum usb_pd_control_swap {
4048 USB_PD_CTRL_SWAP_NONE = 0,
4049 USB_PD_CTRL_SWAP_DATA = 1,
4050 USB_PD_CTRL_SWAP_POWER = 2,
4051 USB_PD_CTRL_SWAP_VCONN = 3,
4052 USB_PD_CTRL_SWAP_COUNT
4053};
4054
4055struct __ec_align1 ec_params_usb_pd_control {
4056 uint8_t port;
4057 uint8_t role;
4058 uint8_t mux;
4059 uint8_t swap;
4060};
4061
4062#define PD_CTRL_RESP_ENABLED_COMMS (1 << 0)
4063#define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1)
4064#define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2)
4065
4066#define PD_CTRL_RESP_ROLE_POWER (1 << 0)
4067#define PD_CTRL_RESP_ROLE_DATA (1 << 1)
4068#define PD_CTRL_RESP_ROLE_VCONN (1 << 2)
4069#define PD_CTRL_RESP_ROLE_DR_POWER (1 << 3)
4070#define PD_CTRL_RESP_ROLE_DR_DATA (1 << 4)
4071#define PD_CTRL_RESP_ROLE_USB_COMM (1 << 5)
4072#define PD_CTRL_RESP_ROLE_EXT_POWERED (1 << 6)
4073
4074struct __ec_align1 ec_response_usb_pd_control {
4075 uint8_t enabled;
4076 uint8_t role;
4077 uint8_t polarity;
4078 uint8_t state;
4079};
4080
4081struct __ec_align1 ec_response_usb_pd_control_v1 {
4082 uint8_t enabled;
4083 uint8_t role;
4084 uint8_t polarity;
4085 char state[32];
4086};
4087
4088#define EC_CMD_USB_PD_PORTS 0x0102
4089
4090
4091#define EC_USB_PD_MAX_PORTS 8
4092
4093struct __ec_align1 ec_response_usb_pd_ports {
4094 uint8_t num_ports;
4095};
4096
4097#define EC_CMD_USB_PD_POWER_INFO 0x0103
4098
4099#define PD_POWER_CHARGING_PORT 0xff
4100struct __ec_align1 ec_params_usb_pd_power_info {
4101 uint8_t port;
4102};
4103
4104enum usb_chg_type {
4105 USB_CHG_TYPE_NONE,
4106 USB_CHG_TYPE_PD,
4107 USB_CHG_TYPE_C,
4108 USB_CHG_TYPE_PROPRIETARY,
4109 USB_CHG_TYPE_BC12_DCP,
4110 USB_CHG_TYPE_BC12_CDP,
4111 USB_CHG_TYPE_BC12_SDP,
4112 USB_CHG_TYPE_OTHER,
4113 USB_CHG_TYPE_VBUS,
4114 USB_CHG_TYPE_UNKNOWN,
4115};
4116enum usb_power_roles {
4117 USB_PD_PORT_POWER_DISCONNECTED,
4118 USB_PD_PORT_POWER_SOURCE,
4119 USB_PD_PORT_POWER_SINK,
4120 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4121};
4122
4123struct __ec_align2 usb_chg_measures {
4124 uint16_t voltage_max;
4125 uint16_t voltage_now;
4126 uint16_t current_max;
4127 uint16_t current_lim;
4128};
4129
4130struct __ec_align4 ec_response_usb_pd_power_info {
4131 uint8_t role;
4132 uint8_t type;
4133 uint8_t dualrole;
4134 uint8_t reserved1;
4135 struct usb_chg_measures meas;
4136 uint32_t max_power;
4137};
4138
4139
4140#define EC_CMD_USB_PD_FW_UPDATE 0x0110
4141
4142enum usb_pd_fw_update_cmds {
4143 USB_PD_FW_REBOOT,
4144 USB_PD_FW_FLASH_ERASE,
4145 USB_PD_FW_FLASH_WRITE,
4146 USB_PD_FW_ERASE_SIG,
4147};
4148
4149struct __ec_align4 ec_params_usb_pd_fw_update {
4150 uint16_t dev_id;
4151 uint8_t cmd;
4152 uint8_t port;
4153 uint32_t size;
4154
4155};
4156
4157
4158#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
4159
4160#define PD_RW_HASH_SIZE 20
4161struct __ec_align1 ec_params_usb_pd_rw_hash_entry {
4162 uint16_t dev_id;
4163 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
4164 uint8_t reserved;
4165
4166
4167 uint32_t current_image;
4168};
4169
4170
4171#define EC_CMD_USB_PD_DEV_INFO 0x0112
4172
4173struct __ec_align1 ec_params_usb_pd_info_request {
4174 uint8_t port;
4175};
4176
4177
4178#define EC_CMD_USB_PD_DISCOVERY 0x0113
4179struct __ec_align_size1 ec_params_usb_pd_discovery_entry {
4180 uint16_t vid;
4181 uint16_t pid;
4182 uint8_t ptype;
4183};
4184
4185
4186#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
4187
4188
4189enum usb_pd_override_ports {
4190 OVERRIDE_DONT_CHARGE = -2,
4191 OVERRIDE_OFF = -1,
4192
4193};
4194
4195struct __ec_align2 ec_params_charge_port_override {
4196 int16_t override_port;
4197};
4198
4199
4200#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
4201
4202struct __ec_align4 ec_response_pd_log {
4203 uint32_t timestamp;
4204 uint8_t type;
4205 uint8_t size_port;
4206 uint16_t data;
4207 uint8_t payload[0];
4208};
4209
4210
4211
4212#define PD_LOG_TIMESTAMP_SHIFT 10
4213
4214#define PD_LOG_SIZE_MASK 0x1f
4215#define PD_LOG_PORT_MASK 0xe0
4216#define PD_LOG_PORT_SHIFT 5
4217#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
4218 ((size) & PD_LOG_SIZE_MASK))
4219#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
4220#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
4221
4222
4223
4224#define PD_EVENT_MCU_BASE 0x00
4225#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
4226#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
4227
4228#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
4229
4230#define PD_EVENT_ACC_BASE 0x20
4231#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
4232#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
4233
4234#define PD_EVENT_PS_BASE 0x40
4235#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
4236
4237#define PD_EVENT_VIDEO_BASE 0x60
4238#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
4239#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
4240
4241#define PD_EVENT_NO_ENTRY 0xff
4242
4243
4244
4245
4246
4247
4248
4249#define CHARGE_FLAGS_DUAL_ROLE (1 << 15)
4250
4251#define CHARGE_FLAGS_DELAYED_OVERRIDE (1 << 14)
4252
4253#define CHARGE_FLAGS_OVERRIDE (1 << 13)
4254
4255#define CHARGE_FLAGS_TYPE_SHIFT 3
4256#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
4257
4258#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
4259
4260
4261
4262
4263#define PS_FAULT_OCP 1
4264#define PS_FAULT_FAST_OCP 2
4265#define PS_FAULT_OVP 3
4266#define PS_FAULT_DISCH 4
4267
4268
4269
4270
4271struct __ec_align4 mcdp_version {
4272 uint8_t major;
4273 uint8_t minor;
4274 uint16_t build;
4275};
4276
4277struct __ec_align4 mcdp_info {
4278 uint8_t family[2];
4279 uint8_t chipid[2];
4280 struct mcdp_version irom;
4281 struct mcdp_version fw;
4282};
4283
4284
4285#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
4286#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
4287
4288
4289#define EC_CMD_USB_PD_GET_AMODE 0x0116
4290struct __ec_align_size1 ec_params_usb_pd_get_mode_request {
4291 uint16_t svid_idx;
4292 uint8_t port;
4293};
4294
4295struct __ec_align4 ec_params_usb_pd_get_mode_response {
4296 uint16_t svid;
4297 uint16_t opos;
4298 uint32_t vdo[6];
4299};
4300
4301#define EC_CMD_USB_PD_SET_AMODE 0x0117
4302
4303enum pd_mode_cmd {
4304 PD_EXIT_MODE = 0,
4305 PD_ENTER_MODE = 1,
4306
4307 PD_MODE_CMD_COUNT,
4308};
4309
4310struct __ec_align4 ec_params_usb_pd_set_mode_request {
4311 uint32_t cmd;
4312 uint16_t svid;
4313 uint8_t opos;
4314 uint8_t port;
4315};
4316
4317
4318#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
4319
4320struct __ec_align1 ec_params_pd_write_log_entry {
4321 uint8_t type;
4322 uint8_t port;
4323};
4324
4325
4326
4327#define EC_CMD_PD_CONTROL 0x0119
4328
4329enum ec_pd_control_cmd {
4330 PD_SUSPEND = 0,
4331 PD_RESUME,
4332 PD_RESET,
4333 PD_CONTROL_DISABLE
4334};
4335
4336struct __ec_align1 ec_params_pd_control {
4337 uint8_t chip;
4338 uint8_t subcmd;
4339};
4340
4341
4342#define EC_CMD_USB_PD_MUX_INFO 0x011A
4343
4344struct __ec_align1 ec_params_usb_pd_mux_info {
4345 uint8_t port;
4346};
4347
4348
4349#define USB_PD_MUX_USB_ENABLED (1 << 0)
4350#define USB_PD_MUX_DP_ENABLED (1 << 1)
4351#define USB_PD_MUX_POLARITY_INVERTED (1 << 2)
4352#define USB_PD_MUX_HPD_IRQ (1 << 3)
4353
4354struct __ec_align1 ec_response_usb_pd_mux_info {
4355 uint8_t flags;
4356};
4357
4358#define EC_CMD_PD_CHIP_INFO 0x011B
4359
4360struct __ec_align1 ec_params_pd_chip_info {
4361 uint8_t port;
4362 uint8_t renew;
4363};
4364
4365struct __ec_align2 ec_response_pd_chip_info {
4366 uint16_t vendor_id;
4367 uint16_t product_id;
4368 uint16_t device_id;
4369 union {
4370 uint8_t fw_version_string[8];
4371 uint64_t fw_version_number;
4372 };
4373};
4374
4375
4376#define EC_CMD_RWSIG_CHECK_STATUS 0x011C
4377
4378struct __ec_align4 ec_response_rwsig_check_status {
4379 uint32_t status;
4380};
4381
4382
4383#define EC_CMD_RWSIG_ACTION 0x011D
4384
4385enum rwsig_action {
4386 RWSIG_ACTION_ABORT = 0,
4387 RWSIG_ACTION_CONTINUE = 1,
4388};
4389
4390struct __ec_align4 ec_params_rwsig_action {
4391 uint32_t action;
4392};
4393
4394
4395#define EC_CMD_EFS_VERIFY 0x011E
4396
4397struct __ec_align1 ec_params_efs_verify {
4398 uint8_t region;
4399};
4400
4401
4402
4403
4404
4405
4406#define EC_CMD_GET_CROS_BOARD_INFO 0x011F
4407
4408
4409
4410
4411#define EC_CMD_SET_CROS_BOARD_INFO 0x0120
4412
4413enum cbi_data_tag {
4414 CBI_TAG_BOARD_VERSION = 0,
4415 CBI_TAG_OEM_ID = 1,
4416 CBI_TAG_SKU_ID = 2,
4417 CBI_TAG_COUNT,
4418};
4419
4420
4421
4422
4423
4424
4425
4426#define CBI_GET_RELOAD (1 << 0)
4427
4428struct __ec_align4 ec_params_get_cbi {
4429 uint32_t type;
4430 uint32_t flag;
4431};
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441#define CBI_SET_NO_SYNC (1 << 0)
4442#define CBI_SET_INIT (1 << 1)
4443
4444struct __ec_align1 ec_params_set_cbi {
4445 uint32_t tag;
4446 uint32_t flag;
4447 uint32_t size;
4448 uint8_t data[];
4449};
4450
4451
4452
4453
4454
4455
4456
4457
4458#define EC_CMD_CR51_BASE 0x0300
4459#define EC_CMD_CR51_LAST 0x03FF
4460
4461
4462
4463
4464
4465#define EC_CMD_FP_PASSTHRU 0x0400
4466
4467#define EC_FP_FLAG_NOT_COMPLETE 0x1
4468
4469struct __ec_align2 ec_params_fp_passthru {
4470 uint16_t len;
4471 uint16_t flags;
4472 uint8_t data[];
4473};
4474
4475
4476#define EC_CMD_FP_SENSOR_CONFIG 0x0401
4477
4478#define EC_FP_SENSOR_CONFIG_MAX_REGS 16
4479
4480struct __ec_align2 ec_params_fp_sensor_config {
4481 uint8_t count;
4482
4483
4484
4485
4486
4487 uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS];
4488 uint8_t data[];
4489};
4490
4491
4492#define EC_CMD_FP_MODE 0x0402
4493
4494
4495#define FP_MODE_DEEPSLEEP (1<<0)
4496
4497#define FP_MODE_FINGER_DOWN (1<<1)
4498
4499#define FP_MODE_FINGER_UP (1<<2)
4500
4501#define FP_MODE_CAPTURE (1<<3)
4502
4503#define FP_MODE_DONT_CHANGE (1<<31)
4504
4505struct __ec_align4 ec_params_fp_mode {
4506 uint32_t mode;
4507
4508};
4509
4510struct __ec_align4 ec_response_fp_mode {
4511 uint32_t mode;
4512
4513};
4514
4515
4516#define EC_CMD_FP_INFO 0x0403
4517
4518struct __ec_align2 ec_response_fp_info {
4519
4520 uint32_t vendor_id;
4521 uint32_t product_id;
4522 uint32_t model_id;
4523 uint32_t version;
4524
4525 uint32_t frame_size;
4526 uint32_t pixel_format;
4527 uint16_t width;
4528 uint16_t height;
4529 uint16_t bpp;
4530};
4531
4532
4533#define EC_CMD_FP_FRAME 0x0404
4534
4535struct __ec_align4 ec_params_fp_frame {
4536 uint32_t offset;
4537 uint32_t size;
4538};
4539
4540
4541
4542
4543
4544#define EC_CMD_TP_SELF_TEST 0x0500
4545
4546
4547#define EC_CMD_TP_FRAME_INFO 0x0501
4548
4549struct __ec_align4 ec_response_tp_frame_info {
4550 uint32_t n_frames;
4551 uint32_t frame_sizes[0];
4552};
4553
4554
4555#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
4556
4557
4558#define EC_CMD_TP_FRAME_GET 0x0503
4559
4560struct __ec_align4 ec_params_tp_frame_get {
4561 uint32_t frame_index;
4562 uint32_t offset;
4563 uint32_t size;
4564};
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
4593#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
4594
4595
4596
4597
4598
4599#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
4600 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
4627#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
4628
4629
4630
4631
4632
4633
4634
4635
4636#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
4637#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
4638#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
4639
4640#endif
4641
4642#endif
4643