LXR uboot/drivers/usb/musb-new/musb

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * MUSB OTG driver DMA controller abstraction
   4 *
   5 * Copyright 2005 Mentor Graphics Corporation
   6 * Copyright (C) 2005-2006 by Texas Instruments
   7 * Copyright (C) 2006-2007 Nokia Corporation
   8 */
   9
  10#ifndef __MUSB_DMA_H__
  11#define __MUSB_DMA_H__
  12
  13struct musb_hw_ep;
  14
  15/*
  16 * DMA Controller Abstraction
  17 *
  18 * DMA Controllers are abstracted to allow use of a variety of different
  19 * implementations of DMA, as allowed by the Inventra USB cores.  On the
  20 * host side, usbcore sets up the DMA mappings and flushes caches; on the
  21 * peripheral side, the gadget controller driver does.  Responsibilities
  22 * of a DMA controller driver include:
  23 *
  24 *  - Handling the details of moving multiple USB packets
  25 *    in cooperation with the Inventra USB core, including especially
  26 *    the correct RX side treatment of short packets and buffer-full
  27 *    states (both of which terminate transfers).
  28 *
  29 *  - Knowing the correlation between dma channels and the
  30 *    Inventra core's local endpoint resources and data direction.
  31 *
  32 *  - Maintaining a list of allocated/available channels.
  33 *
  34 *  - Updating channel status on interrupts,
  35 *    whether shared with the Inventra core or separate.
  36 */
  37
  38#define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  39
  40#ifndef CONFIG_USB_MUSB_PIO_ONLY
  41#define is_dma_capable()        (1)
  42#else
  43#define is_dma_capable()        (0)
  44#endif
  45
  46#ifdef CONFIG_USB_TI_CPPI_DMA
  47#define is_cppi_enabled()       1
  48#else
  49#define is_cppi_enabled()       0
  50#endif
  51
  52#ifdef CONFIG_USB_TUSB_OMAP_DMA
  53#define tusb_dma_omap()                 1
  54#else
  55#define tusb_dma_omap()                 0
  56#endif
  57
  58/*
  59 * DMA channel status ... updated by the dma controller driver whenever that
  60 * status changes, and protected by the overall controller spinlock.
  61 */
  62enum dma_channel_status {
  63        /* unallocated */
  64        MUSB_DMA_STATUS_UNKNOWN,
  65        /* allocated ... but not busy, no errors */
  66        MUSB_DMA_STATUS_FREE,
  67        /* busy ... transactions are active */
  68        MUSB_DMA_STATUS_BUSY,
  69        /* transaction(s) aborted due to ... dma or memory bus error */
  70        MUSB_DMA_STATUS_BUS_ABORT,
  71        /* transaction(s) aborted due to ... core error or USB fault */
  72        MUSB_DMA_STATUS_CORE_ABORT
  73};
  74
  75struct dma_controller;
  76
  77/**
  78 * struct dma_channel - A DMA channel.
  79 * @private_data: channel-private data
  80 * @max_len: the maximum number of bytes the channel can move in one
  81 *      transaction (typically representing many USB maximum-sized packets)
  82 * @actual_len: how many bytes have been transferred
  83 * @status: current channel status (updated e.g. on interrupt)
  84 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
  85 *
  86 * channels are associated with an endpoint for the duration of at least
  87 * one usb transfer.
  88 */
  89struct dma_channel {
  90        void                    *private_data;
  91        /* FIXME not void* private_data, but a dma_controller * */
  92        size_t                  max_len;
  93        size_t                  actual_len;
  94        enum dma_channel_status status;
  95        bool                    desired_mode;
  96};
  97
  98/*
  99 * dma_channel_status - return status of dma channel
 100 * @c: the channel
 101 *
 102 * Returns the software's view of the channel status.  If that status is BUSY
 103 * then it's possible that the hardware has completed (or aborted) a transfer,
 104 * so the driver needs to update that status.
 105 */
 106static inline enum dma_channel_status
 107dma_channel_status(struct dma_channel *c)
 108{
 109        return (is_dma_capable() && c) ? c->status : MUSB_DMA_STATUS_UNKNOWN;
 110}
 111
 112/**
 113 * struct dma_controller - A DMA Controller.
 114 * @start: call this to start a DMA controller;
 115 *      return 0 on success, else negative errno
 116 * @stop: call this to stop a DMA controller
 117 *      return 0 on success, else negative errno
 118 * @channel_alloc: call this to allocate a DMA channel
 119 * @channel_release: call this to release a DMA channel
 120 * @channel_abort: call this to abort a pending DMA transaction,
 121 *      returning it to FREE (but allocated) state
 122 *
 123 * Controllers manage dma channels.
 124 */
 125struct dma_controller {
 126        int                     (*start)(struct dma_controller *);
 127        int                     (*stop)(struct dma_controller *);
 128        struct dma_channel      *(*channel_alloc)(struct dma_controller *,
 129                                        struct musb_hw_ep *, u8 is_tx);
 130        void                    (*channel_release)(struct dma_channel *);
 131        int                     (*channel_program)(struct dma_channel *channel,
 132                                                        u16 maxpacket, u8 mode,
 133                                                        dma_addr_t dma_addr,
 134                                                        u32 length);
 135        int                     (*channel_abort)(struct dma_channel *);
 136        int                     (*is_compatible)(struct dma_channel *channel,
 137                                                        u16 maxpacket,
 138                                                        void *buf, u32 length);
 139};
 140
 141/* called after channel_program(), may indicate a fault */
 142extern void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit);
 143
 144
 145extern struct dma_controller *__init
 146dma_controller_create(struct musb *, void __iomem *);
 147
 148extern void dma_controller_destroy(struct dma_controller *);
 149
 150#endif  /* __MUSB_DMA_H__ */
 151