uboot/drivers/usb/musb-new/musb_dsps.c
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   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Texas Instruments DSPS platforms "glue layer"
   4 *
   5 * Copyright (C) 2012, by Texas Instruments
   6 *
   7 * Based on the am35x "glue layer" code.
   8 *
   9 * This file is part of the Inventra Controller Driver for Linux.
  10 *
  11 * musb_dsps.c will be a common file for all the TI DSPS platforms
  12 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
  13 * For now only ti81x is using this and in future davinci.c, am35x.c
  14 * da8xx.c would be merged to this file after testing.
  15 */
  16
  17#ifndef __UBOOT__
  18#include <dm/device_compat.h>
  19#include <dm/devres.h>
  20#include <linux/init.h>
  21#include <linux/io.h>
  22#include <linux/err.h>
  23#include <linux/platform_device.h>
  24#include <linux/dma-mapping.h>
  25#include <linux/pm_runtime.h>
  26#include <linux/module.h>
  27
  28#include <linux/of.h>
  29#include <linux/of_device.h>
  30#include <linux/of_address.h>
  31
  32#include <plat/usb.h>
  33#else
  34#include <common.h>
  35#include <dm.h>
  36#include <dm/device_compat.h>
  37#include <asm/omap_musb.h>
  38#include "linux-compat.h"
  39#endif
  40
  41#include "musb_core.h"
  42
  43/**
  44 * avoid using musb_readx()/musb_writex() as glue layer should not be
  45 * dependent on musb core layer symbols.
  46 */
  47static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
  48        { return __raw_readb(addr + offset); }
  49
  50static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
  51        { return __raw_readl(addr + offset); }
  52
  53static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
  54        { __raw_writeb(data, addr + offset); }
  55
  56static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
  57        { __raw_writel(data, addr + offset); }
  58
  59/**
  60 * DSPS musb wrapper register offset.
  61 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
  62 * musb ips.
  63 */
  64struct dsps_musb_wrapper {
  65        u16     revision;
  66        u16     control;
  67        u16     status;
  68        u16     eoi;
  69        u16     epintr_set;
  70        u16     epintr_clear;
  71        u16     epintr_status;
  72        u16     coreintr_set;
  73        u16     coreintr_clear;
  74        u16     coreintr_status;
  75        u16     phy_utmi;
  76        u16     mode;
  77
  78        /* bit positions for control */
  79        unsigned        reset:5;
  80
  81        /* bit positions for interrupt */
  82        unsigned        usb_shift:5;
  83        u32             usb_mask;
  84        u32             usb_bitmap;
  85        unsigned        drvvbus:5;
  86
  87        unsigned        txep_shift:5;
  88        u32             txep_mask;
  89        u32             txep_bitmap;
  90
  91        unsigned        rxep_shift:5;
  92        u32             rxep_mask;
  93        u32             rxep_bitmap;
  94
  95        /* bit positions for phy_utmi */
  96        unsigned        otg_disable:5;
  97
  98        /* bit positions for mode */
  99        unsigned        iddig:5;
 100        /* miscellaneous stuff */
 101        u32             musb_core_offset;
 102        u8              poll_seconds;
 103};
 104
 105static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
 106        .revision               = 0x00,
 107        .control                = 0x14,
 108        .status                 = 0x18,
 109        .eoi                    = 0x24,
 110        .epintr_set             = 0x38,
 111        .epintr_clear           = 0x40,
 112        .epintr_status          = 0x30,
 113        .coreintr_set           = 0x3c,
 114        .coreintr_clear         = 0x44,
 115        .coreintr_status        = 0x34,
 116        .phy_utmi               = 0xe0,
 117        .mode                   = 0xe8,
 118        .reset                  = 0,
 119        .otg_disable            = 21,
 120        .iddig                  = 8,
 121        .usb_shift              = 0,
 122        .usb_mask               = 0x1ff,
 123        .usb_bitmap             = (0x1ff << 0),
 124        .drvvbus                = 8,
 125        .txep_shift             = 0,
 126        .txep_mask              = 0xffff,
 127        .txep_bitmap            = (0xffff << 0),
 128        .rxep_shift             = 16,
 129        .rxep_mask              = 0xfffe,
 130        .rxep_bitmap            = (0xfffe << 16),
 131        .musb_core_offset       = 0x400,
 132        .poll_seconds           = 2,
 133};
 134
 135/**
 136 * DSPS glue structure.
 137 */
 138struct dsps_glue {
 139        struct device *dev;
 140        struct platform_device *musb;   /* child musb pdev */
 141        const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
 142        struct timer_list timer;        /* otg_workaround timer */
 143};
 144
 145/**
 146 * dsps_musb_enable - enable interrupts
 147 */
 148#ifndef __UBOOT__
 149static void dsps_musb_enable(struct musb *musb)
 150#else
 151static int dsps_musb_enable(struct musb *musb)
 152#endif
 153{
 154#ifndef __UBOOT__
 155        struct device *dev = musb->controller;
 156        struct platform_device *pdev = to_platform_device(dev->parent);
 157        struct dsps_glue *glue = platform_get_drvdata(pdev);
 158        const struct dsps_musb_wrapper *wrp = glue->wrp;
 159#else
 160        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 161#endif
 162        void __iomem *reg_base = musb->ctrl_base;
 163        u32 epmask, coremask;
 164
 165        /* Workaround: setup IRQs through both register sets. */
 166        epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
 167               ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
 168        coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
 169
 170        dsps_writel(reg_base, wrp->epintr_set, epmask);
 171        dsps_writel(reg_base, wrp->coreintr_set, coremask);
 172        /* Force the DRVVBUS IRQ so we can start polling for ID change. */
 173#ifndef __UBOOT__
 174        if (is_otg_enabled(musb))
 175                dsps_writel(reg_base, wrp->coreintr_set,
 176                            (1 << wrp->drvvbus) << wrp->usb_shift);
 177#else
 178        return 0;
 179#endif
 180}
 181
 182/**
 183 * dsps_musb_disable - disable HDRC and flush interrupts
 184 */
 185static void dsps_musb_disable(struct musb *musb)
 186{
 187#ifndef __UBOOT__
 188        struct device *dev = musb->controller;
 189        struct platform_device *pdev = to_platform_device(dev->parent);
 190        struct dsps_glue *glue = platform_get_drvdata(pdev);
 191        const struct dsps_musb_wrapper *wrp = glue->wrp;
 192        void __iomem *reg_base = musb->ctrl_base;
 193
 194        dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
 195        dsps_writel(reg_base, wrp->epintr_clear,
 196                         wrp->txep_bitmap | wrp->rxep_bitmap);
 197        dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
 198        dsps_writel(reg_base, wrp->eoi, 0);
 199#endif
 200}
 201
 202#ifndef __UBOOT__
 203static void otg_timer(unsigned long _musb)
 204{
 205        struct musb *musb = (void *)_musb;
 206        void __iomem *mregs = musb->mregs;
 207        struct device *dev = musb->controller;
 208        struct platform_device *pdev = to_platform_device(dev->parent);
 209        struct dsps_glue *glue = platform_get_drvdata(pdev);
 210        const struct dsps_musb_wrapper *wrp = glue->wrp;
 211        u8 devctl;
 212        unsigned long flags;
 213
 214        /*
 215         * We poll because DSPS IP's won't expose several OTG-critical
 216         * status change events (from the transceiver) otherwise.
 217         */
 218        devctl = dsps_readb(mregs, MUSB_DEVCTL);
 219        dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
 220                                otg_state_string(musb->xceiv->state));
 221
 222        spin_lock_irqsave(&musb->lock, flags);
 223        switch (musb->xceiv->state) {
 224        case OTG_STATE_A_WAIT_BCON:
 225                devctl &= ~MUSB_DEVCTL_SESSION;
 226                dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
 227
 228                devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
 229                if (devctl & MUSB_DEVCTL_BDEVICE) {
 230                        musb->xceiv->state = OTG_STATE_B_IDLE;
 231                        MUSB_DEV_MODE(musb);
 232                } else {
 233                        musb->xceiv->state = OTG_STATE_A_IDLE;
 234                        MUSB_HST_MODE(musb);
 235                }
 236                break;
 237        case OTG_STATE_A_WAIT_VFALL:
 238                musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 239                dsps_writel(musb->ctrl_base, wrp->coreintr_set,
 240                            MUSB_INTR_VBUSERROR << wrp->usb_shift);
 241                break;
 242        case OTG_STATE_B_IDLE:
 243                if (!is_peripheral_enabled(musb))
 244                        break;
 245
 246                devctl = dsps_readb(mregs, MUSB_DEVCTL);
 247                if (devctl & MUSB_DEVCTL_BDEVICE)
 248                        mod_timer(&glue->timer,
 249                                        jiffies + wrp->poll_seconds * HZ);
 250                else
 251                        musb->xceiv->state = OTG_STATE_A_IDLE;
 252                break;
 253        default:
 254                break;
 255        }
 256        spin_unlock_irqrestore(&musb->lock, flags);
 257}
 258
 259static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
 260{
 261        struct device *dev = musb->controller;
 262        struct platform_device *pdev = to_platform_device(dev->parent);
 263        struct dsps_glue *glue = platform_get_drvdata(pdev);
 264        static unsigned long last_timer;
 265
 266        if (!is_otg_enabled(musb))
 267                return;
 268
 269        if (timeout == 0)
 270                timeout = jiffies + msecs_to_jiffies(3);
 271
 272        /* Never idle if active, or when VBUS timeout is not set as host */
 273        if (musb->is_active || (musb->a_wait_bcon == 0 &&
 274                                musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
 275                dev_dbg(musb->controller, "%s active, deleting timer\n",
 276                                otg_state_string(musb->xceiv->state));
 277                del_timer(&glue->timer);
 278                last_timer = jiffies;
 279                return;
 280        }
 281
 282        if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
 283                dev_dbg(musb->controller,
 284                        "Longer idle timer already pending, ignoring...\n");
 285                return;
 286        }
 287        last_timer = timeout;
 288
 289        dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
 290                otg_state_string(musb->xceiv->state),
 291                        jiffies_to_msecs(timeout - jiffies));
 292        mod_timer(&glue->timer, timeout);
 293}
 294#endif
 295
 296static irqreturn_t dsps_interrupt(int irq, void *hci)
 297{
 298        struct musb  *musb = hci;
 299        void __iomem *reg_base = musb->ctrl_base;
 300#ifndef __UBOOT__
 301        struct device *dev = musb->controller;
 302        struct platform_device *pdev = to_platform_device(dev->parent);
 303        struct dsps_glue *glue = platform_get_drvdata(pdev);
 304        const struct dsps_musb_wrapper *wrp = glue->wrp;
 305#else
 306        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 307#endif
 308        unsigned long flags;
 309        irqreturn_t ret = IRQ_NONE;
 310        u32 epintr, usbintr;
 311
 312        spin_lock_irqsave(&musb->lock, flags);
 313
 314        /* Get endpoint interrupts */
 315        epintr = dsps_readl(reg_base, wrp->epintr_status);
 316        musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
 317        musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
 318
 319        if (epintr)
 320                dsps_writel(reg_base, wrp->epintr_status, epintr);
 321
 322        /* Get usb core interrupts */
 323        usbintr = dsps_readl(reg_base, wrp->coreintr_status);
 324        if (!usbintr && !epintr)
 325                goto eoi;
 326
 327        musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
 328        if (usbintr)
 329                dsps_writel(reg_base, wrp->coreintr_status, usbintr);
 330
 331        dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
 332                        usbintr, epintr);
 333#ifndef __UBOOT__
 334        /*
 335         * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
 336         * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
 337         * switch appropriately between halves of the OTG state machine.
 338         * Managing DEVCTL.SESSION per Mentor docs requires that we know its
 339         * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
 340         * Also, DRVVBUS pulses for SRP (but not at 5V) ...
 341         */
 342        if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
 343                pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
 344
 345        if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
 346                int drvvbus = dsps_readl(reg_base, wrp->status);
 347                void __iomem *mregs = musb->mregs;
 348                u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
 349                int err;
 350
 351                err = is_host_enabled(musb) && (musb->int_usb &
 352                                                MUSB_INTR_VBUSERROR);
 353                if (err) {
 354                        /*
 355                         * The Mentor core doesn't debounce VBUS as needed
 356                         * to cope with device connect current spikes. This
 357                         * means it's not uncommon for bus-powered devices
 358                         * to get VBUS errors during enumeration.
 359                         *
 360                         * This is a workaround, but newer RTL from Mentor
 361                         * seems to allow a better one: "re"-starting sessions
 362                         * without waiting for VBUS to stop registering in
 363                         * devctl.
 364                         */
 365                        musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 366                        musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
 367                        mod_timer(&glue->timer,
 368                                        jiffies + wrp->poll_seconds * HZ);
 369                        WARNING("VBUS error workaround (delay coming)\n");
 370                } else if (is_host_enabled(musb) && drvvbus) {
 371                        musb->is_active = 1;
 372                        MUSB_HST_MODE(musb);
 373                        musb->xceiv->otg->default_a = 1;
 374                        musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 375                        del_timer(&glue->timer);
 376                } else {
 377                        musb->is_active = 0;
 378                        MUSB_DEV_MODE(musb);
 379                        musb->xceiv->otg->default_a = 0;
 380                        musb->xceiv->state = OTG_STATE_B_IDLE;
 381                }
 382
 383                /* NOTE: this must complete power-on within 100 ms. */
 384                dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 385                                drvvbus ? "on" : "off",
 386                                otg_state_string(musb->xceiv->state),
 387                                err ? " ERROR" : "",
 388                                devctl);
 389                ret = IRQ_HANDLED;
 390        }
 391#endif
 392
 393        if (musb->int_tx || musb->int_rx || musb->int_usb)
 394                ret |= musb_interrupt(musb);
 395
 396 eoi:
 397        /* EOI needs to be written for the IRQ to be re-asserted. */
 398        if (ret == IRQ_HANDLED || epintr || usbintr)
 399                dsps_writel(reg_base, wrp->eoi, 1);
 400
 401#ifndef __UBOOT__
 402        /* Poll for ID change */
 403        if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
 404                mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
 405#endif
 406
 407        spin_unlock_irqrestore(&musb->lock, flags);
 408
 409        return ret;
 410}
 411
 412static int dsps_musb_init(struct musb *musb)
 413{
 414#ifndef __UBOOT__
 415        struct device *dev = musb->controller;
 416        struct musb_hdrc_platform_data *plat = dev->platform_data;
 417        struct platform_device *pdev = to_platform_device(dev->parent);
 418        struct dsps_glue *glue = platform_get_drvdata(pdev);
 419        const struct dsps_musb_wrapper *wrp = glue->wrp;
 420        struct omap_musb_board_data *data = plat->board_data;
 421#else
 422        struct omap_musb_board_data *data =
 423                        (struct omap_musb_board_data *)musb->controller;
 424        const struct dsps_musb_wrapper *wrp = &ti81xx_driver_data;
 425#endif
 426        void __iomem *reg_base = musb->ctrl_base;
 427        u32 rev, val;
 428        int status;
 429
 430        /* mentor core register starts at offset of 0x400 from musb base */
 431        musb->mregs += wrp->musb_core_offset;
 432
 433#ifndef __UBOOT__
 434        /* NOP driver needs change if supporting dual instance */
 435        usb_nop_xceiv_register();
 436        musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
 437        if (IS_ERR_OR_NULL(musb->xceiv))
 438                return -ENODEV;
 439#endif
 440
 441        /* Returns zero if e.g. not clocked */
 442        rev = dsps_readl(reg_base, wrp->revision);
 443        if (!rev) {
 444                status = -ENODEV;
 445                goto err0;
 446        }
 447
 448#ifndef __UBOOT__
 449        if (is_host_enabled(musb))
 450                setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
 451#endif
 452
 453        /* Reset the musb */
 454        dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
 455
 456        /* Start the on-chip PHY and its PLL. */
 457        if (data && data->set_phy_power)
 458                data->set_phy_power(data->dev, 1);
 459
 460        musb->isr = dsps_interrupt;
 461
 462        /* reset the otgdisable bit, needed for host mode to work */
 463        val = dsps_readl(reg_base, wrp->phy_utmi);
 464        val &= ~(1 << wrp->otg_disable);
 465        dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
 466
 467        /* clear level interrupt */
 468        dsps_writel(reg_base, wrp->eoi, 0);
 469
 470        return 0;
 471err0:
 472#ifndef __UBOOT__
 473        usb_put_phy(musb->xceiv);
 474        usb_nop_xceiv_unregister();
 475#endif
 476        return status;
 477}
 478
 479static int dsps_musb_exit(struct musb *musb)
 480{
 481#ifndef __UBOOT__
 482        struct device *dev = musb->controller;
 483        struct musb_hdrc_platform_data *plat = dev->platform_data;
 484        struct omap_musb_board_data *data = plat->board_data;
 485        struct platform_device *pdev = to_platform_device(dev->parent);
 486        struct dsps_glue *glue = platform_get_drvdata(pdev);
 487#else
 488        struct omap_musb_board_data *data =
 489                        (struct omap_musb_board_data *)musb->controller;
 490#endif
 491
 492#ifndef __UBOOT__
 493        if (is_host_enabled(musb))
 494                del_timer_sync(&glue->timer);
 495#endif
 496
 497        /* Shutdown the on-chip PHY and its PLL. */
 498        if (data && data->set_phy_power)
 499                data->set_phy_power(data->dev, 0);
 500
 501#ifndef __UBOOT__
 502        /* NOP driver needs change if supporting dual instance */
 503        usb_put_phy(musb->xceiv);
 504        usb_nop_xceiv_unregister();
 505#endif
 506
 507        return 0;
 508}
 509
 510#ifndef __UBOOT__
 511static struct musb_platform_ops dsps_ops = {
 512#else
 513struct musb_platform_ops musb_dsps_ops = {
 514#endif
 515        .init           = dsps_musb_init,
 516        .exit           = dsps_musb_exit,
 517
 518        .enable         = dsps_musb_enable,
 519        .disable        = dsps_musb_disable,
 520
 521#ifndef __UBOOT__
 522        .try_idle       = dsps_musb_try_idle,
 523#endif
 524};
 525
 526#ifndef __UBOOT__
 527static u64 musb_dmamask = DMA_BIT_MASK(32);
 528#endif
 529
 530#ifndef __UBOOT__
 531static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
 532{
 533        struct device *dev = glue->dev;
 534        struct platform_device *pdev = to_platform_device(dev);
 535        struct musb_hdrc_platform_data  *pdata = dev->platform_data;
 536        struct platform_device  *musb;
 537        struct resource *res;
 538        struct resource resources[2];
 539        char res_name[10];
 540        int ret;
 541
 542        /* get memory resource */
 543        sprintf(res_name, "musb%d", id);
 544        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
 545        if (!res) {
 546                dev_err(dev, "%s get mem resource failed\n", res_name);
 547                ret = -ENODEV;
 548                goto err0;
 549        }
 550        res->parent = NULL;
 551        resources[0] = *res;
 552
 553        /* get irq resource */
 554        sprintf(res_name, "musb%d-irq", id);
 555        res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
 556        if (!res) {
 557                dev_err(dev, "%s get irq resource failed\n", res_name);
 558                ret = -ENODEV;
 559                goto err0;
 560        }
 561        res->parent = NULL;
 562        resources[1] = *res;
 563        resources[1].name = "mc";
 564
 565        /* allocate the child platform device */
 566        musb = platform_device_alloc("musb-hdrc", -1);
 567        if (!musb) {
 568                dev_err(dev, "failed to allocate musb device\n");
 569                ret = -ENOMEM;
 570                goto err0;
 571        }
 572
 573        musb->dev.parent                = dev;
 574        musb->dev.dma_mask              = &musb_dmamask;
 575        musb->dev.coherent_dma_mask     = musb_dmamask;
 576
 577        glue->musb                      = musb;
 578
 579        pdata->platform_ops             = &dsps_ops;
 580
 581        ret = platform_device_add_resources(musb, resources, 2);
 582        if (ret) {
 583                dev_err(dev, "failed to add resources\n");
 584                goto err1;
 585        }
 586
 587        ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
 588        if (ret) {
 589                dev_err(dev, "failed to add platform_data\n");
 590                goto err1;
 591        }
 592
 593        ret = platform_device_add(musb);
 594        if (ret) {
 595                dev_err(dev, "failed to register musb device\n");
 596                goto err1;
 597        }
 598
 599        return 0;
 600
 601err1:
 602        platform_device_put(musb);
 603err0:
 604        return ret;
 605}
 606
 607static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
 608{
 609        platform_device_del(glue->musb);
 610        platform_device_put(glue->musb);
 611}
 612
 613static int __devinit dsps_probe(struct platform_device *pdev)
 614{
 615        const struct platform_device_id *id = platform_get_device_id(pdev);
 616        const struct dsps_musb_wrapper *wrp =
 617                                (struct dsps_musb_wrapper *)id->driver_data;
 618        struct dsps_glue *glue;
 619        struct resource *iomem;
 620        int ret;
 621
 622        /* allocate glue */
 623        glue = kzalloc(sizeof(*glue), GFP_KERNEL);
 624        if (!glue) {
 625                dev_err(&pdev->dev, "unable to allocate glue memory\n");
 626                ret = -ENOMEM;
 627                goto err0;
 628        }
 629
 630        /* get memory resource */
 631        iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 632        if (!iomem) {
 633                dev_err(&pdev->dev, "failed to get usbss mem resource\n");
 634                ret = -ENODEV;
 635                goto err1;
 636        }
 637
 638        glue->dev = &pdev->dev;
 639
 640        glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
 641        if (!glue->wrp) {
 642                dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
 643                ret = -ENOMEM;
 644                goto err1;
 645        }
 646        platform_set_drvdata(pdev, glue);
 647
 648        /* enable the usbss clocks */
 649        pm_runtime_enable(&pdev->dev);
 650
 651        ret = pm_runtime_get_sync(&pdev->dev);
 652        if (ret < 0) {
 653                dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
 654                goto err2;
 655        }
 656
 657        /* create the child platform device for first instances of musb */
 658        ret = dsps_create_musb_pdev(glue, 0);
 659        if (ret != 0) {
 660                dev_err(&pdev->dev, "failed to create child pdev\n");
 661                goto err3;
 662        }
 663
 664        return 0;
 665
 666err3:
 667        pm_runtime_put(&pdev->dev);
 668err2:
 669        pm_runtime_disable(&pdev->dev);
 670        kfree(glue->wrp);
 671err1:
 672        kfree(glue);
 673err0:
 674        return ret;
 675}
 676static int __devexit dsps_remove(struct platform_device *pdev)
 677{
 678        struct dsps_glue *glue = platform_get_drvdata(pdev);
 679
 680        /* delete the child platform device */
 681        dsps_delete_musb_pdev(glue);
 682
 683        /* disable usbss clocks */
 684        pm_runtime_put(&pdev->dev);
 685        pm_runtime_disable(&pdev->dev);
 686        kfree(glue->wrp);
 687        kfree(glue);
 688        return 0;
 689}
 690
 691#ifdef CONFIG_PM_SLEEP
 692static int dsps_suspend(struct device *dev)
 693{
 694        struct musb_hdrc_platform_data *plat = dev->platform_data;
 695        struct omap_musb_board_data *data = plat->board_data;
 696
 697        /* Shutdown the on-chip PHY and its PLL. */
 698        if (data && data->set_phy_power)
 699                data->set_phy_power(data->dev, 0);
 700
 701        return 0;
 702}
 703
 704static int dsps_resume(struct device *dev)
 705{
 706        struct musb_hdrc_platform_data *plat = dev->platform_data;
 707        struct omap_musb_board_data *data = plat->board_data;
 708
 709        /* Start the on-chip PHY and its PLL. */
 710        if (data && data->set_phy_power)
 711                data->set_phy_power(data->dev, 1);
 712
 713        return 0;
 714}
 715#endif
 716
 717static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
 718#endif
 719
 720#ifndef __UBOOT__
 721static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
 722        {
 723                .name   = "musb-ti81xx",
 724                .driver_data    = (kernel_ulong_t) &ti81xx_driver_data,
 725        },
 726        {  },   /* Terminating Entry */
 727};
 728MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
 729
 730static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
 731        { .compatible = "musb-ti81xx", },
 732        { .compatible = "ti,ti81xx-musb", },
 733        { .compatible = "ti,am335x-musb", },
 734        {  },
 735};
 736MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
 737
 738static struct platform_driver dsps_usbss_driver = {
 739        .probe          = dsps_probe,
 740        .remove         = __devexit_p(dsps_remove),
 741        .driver         = {
 742                .name   = "musb-dsps",
 743                .pm     = &dsps_pm_ops,
 744                .of_match_table = musb_dsps_of_match,
 745        },
 746        .id_table       = musb_dsps_id_table,
 747};
 748
 749MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
 750MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
 751MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
 752MODULE_LICENSE("GPL v2");
 753
 754static int __init dsps_init(void)
 755{
 756        return platform_driver_register(&dsps_usbss_driver);
 757}
 758subsys_initcall(dsps_init);
 759
 760static void __exit dsps_exit(void)
 761{
 762        platform_driver_unregister(&dsps_usbss_driver);
 763}
 764module_exit(dsps_exit);
 765#endif
 766