LXR uboot/board/cavium/thunderx/thunderx.c

   1// SPDX-License-Identifier: GPL-2.0+
   2/**
   3 * (C) Copyright 2014, Cavium Inc.
   4**/
   5
   6#include <common.h>
   7#include <cpu_func.h>
   8#include <dm.h>
   9#include <init.h>
  10#include <malloc.h>
  11#include <errno.h>
  12#include <net.h>
  13#include <asm/global_data.h>
  14#include <linux/compiler.h>
  15
  16#include <cavium/atf.h>
  17#include <asm/armv8/mmu.h>
  18
  19#if !CONFIG_IS_ENABLED(OF_CONTROL)
  20#include <dm/platform_data/serial_pl01x.h>
  21
  22static const struct pl01x_serial_plat serial0 = {
  23        .base = CFG_SYS_SERIAL0,
  24        .type = TYPE_PL011,
  25        .clock = 0,
  26        .skip_init = true,
  27};
  28
  29U_BOOT_DRVINFO(thunderx_serial0) = {
  30        .name = "serial_pl01x",
  31        .plat = &serial0,
  32};
  33
  34static const struct pl01x_serial_plat serial1 = {
  35        .base = CFG_SYS_SERIAL1,
  36        .type = TYPE_PL011,
  37        .clock = 0,
  38        .skip_init = true,
  39};
  40
  41U_BOOT_DRVINFO(thunderx_serial1) = {
  42        .name = "serial_pl01x",
  43        .plat = &serial1,
  44};
  45#endif
  46
  47DECLARE_GLOBAL_DATA_PTR;
  48
  49static struct mm_region thunderx_mem_map[] = {
  50        {
  51                .virt = 0x000000000000UL,
  52                .phys = 0x000000000000UL,
  53                .size = 0x40000000000UL,
  54                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NON_SHARE,
  55        }, {
  56                .virt = 0x800000000000UL,
  57                .phys = 0x800000000000UL,
  58                .size = 0x40000000000UL,
  59                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  60                         PTE_BLOCK_NON_SHARE,
  61        }, {
  62                .virt = 0x840000000000UL,
  63                .phys = 0x840000000000UL,
  64                .size = 0x40000000000UL,
  65                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  66                         PTE_BLOCK_NON_SHARE,
  67        }, {
  68                /* List terminator */
  69                0,
  70        }
  71};
  72
  73struct mm_region *mem_map = thunderx_mem_map;
  74
  75int board_init(void)
  76{
  77        return 0;
  78}
  79
  80int timer_init(void)
  81{
  82        return 0;
  83}
  84
  85int dram_init(void)
  86{
  87        ssize_t node_count = atf_node_count();
  88        ssize_t dram_size;
  89        int node;
  90
  91        printf("Initializing\nNodes in system: %zd\n", node_count);
  92
  93        gd->ram_size = 0;
  94
  95        for (node = 0; node < node_count; node++) {
  96                dram_size = atf_dram_size(node);
  97                printf("Node %d: %zd MBytes of DRAM\n", node, dram_size >> 20);
  98                gd->ram_size += dram_size;
  99        }
 100
 101        gd->ram_size -= MEM_BASE;
 102
 103        *(unsigned long *)CPU_RELEASE_ADDR = 0;
 104
 105        puts("DRAM size:");
 106
 107        return 0;
 108}
 109
 110/*
 111 * Board specific reset that is system reset.
 112 */
 113void reset_cpu(void)
 114{
 115}
 116
 117/*
 118 * Board specific ethernet initialization routine.
 119 */
 120int board_eth_init(struct bd_info *bis)
 121{
 122        int rc = 0;
 123
 124        return rc;
 125}
 126