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6
7#include <common.h>
8#include <init.h>
9#include <asm/global_data.h>
10#include <asm/io.h>
11#include <asm/arch/imx-regs.h>
12#include <asm/arch/sys_proto.h>
13#include <asm/arch/crm_regs.h>
14#include <asm/arch/clock.h>
15#include <asm/arch/iomux-mx53.h>
16#include <asm/arch/clock.h>
17#include <asm/gpio.h>
18#include <env.h>
19#include <power/pmic.h>
20#include <fsl_pmic.h>
21#include <bootstage.h>
22#include "kp_id_rev.h"
23
24#define BOOSTER_OFF IMX_GPIO_NR(2, 23)
25#define LCD_BACKLIGHT IMX_GPIO_NR(1, 1)
26#define KEY1 IMX_GPIO_NR(2, 26)
27#define LED_RED IMX_GPIO_NR(3, 28)
28
29DECLARE_GLOBAL_DATA_PTR;
30
31int dram_init(void)
32{
33 u32 size;
34
35 size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
36 gd->ram_size = size;
37
38 return 0;
39}
40
41int dram_init_banksize(void)
42{
43 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
44 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
45
46 return 0;
47}
48
49static int power_init(void)
50{
51 struct udevice *dev;
52 int ret;
53
54 ret = pmic_get("mc34708@8", &dev);
55 if (ret) {
56 printf("%s: mc34708 not found !\n", __func__);
57 return ret;
58 }
59
60
61 pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708,
62 SWx_1_110V_MC34708);
63
64
65 pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708,
66 SWx_1_300V_MC34708);
67
68
69 pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708,
70 TIMER_4S_MC34708);
71
72 return ret;
73}
74
75static void setup_clocks(void)
76{
77 int ret;
78 u32 ref_clk = MXC_HCLK;
79
80
81
82 ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK);
83 if (ret)
84 printf("CPU: Switch CPU clock to 800MHZ failed\n");
85
86 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
87 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
88 if (ret)
89 printf("CPU: Switch DDR clock to 400MHz failed\n");
90}
91
92static void setup_ups(void)
93{
94 gpio_request(BOOSTER_OFF, "BOOSTER_OFF");
95 gpio_direction_output(BOOSTER_OFF, 0);
96}
97
98int board_early_init_f(void)
99{
100 return 0;
101}
102
103
104
105
106
107int overwrite_console(void)
108{
109 return 1;
110}
111
112int board_init(void)
113{
114 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
115
116 return 0;
117}
118
119void board_disable_display(void)
120{
121 gpio_request(LCD_BACKLIGHT, "LCD_BACKLIGHT");
122 gpio_direction_output(LCD_BACKLIGHT, 0);
123}
124
125void board_misc_setup(void)
126{
127 gpio_request(KEY1, "KEY1_GPIO");
128 gpio_direction_input(KEY1);
129
130 if (gpio_get_value(KEY1))
131 env_set("key1", "off");
132 else
133 env_set("key1", "on");
134}
135
136int board_late_init(void)
137{
138 int ret = 0;
139
140 board_disable_display();
141 setup_ups();
142
143 if (!power_init())
144 setup_clocks();
145
146 ret = read_eeprom();
147 if (ret)
148 printf("Error %d reading EEPROM content!\n", ret);
149
150 show_eeprom();
151 read_board_id();
152
153 board_misc_setup();
154
155 return ret;
156}
157
158#if CONFIG_IS_ENABLED(BOOTSTAGE)
159#define GPIO_DR 0x0
160#define GPIO_GDIR 0x4
161#define GPIO_ALT1 0x1
162#define GPIO5_BASE 0x53FDC000
163#define IOMUXC_EIM_WAIT 0x53FA81E4
164
165#define GPIO_GREEN BIT(0)
166
167void show_boot_progress(int status)
168{
169
170
171
172
173 if (status == BOOTSTAGE_ID_START_UBOOT_F) {
174
175
176
177
178
179 setbits_le32(((uint32_t *)(IOMUXC_EIM_WAIT)), GPIO_ALT1);
180
181
182 setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_GDIR)),
183 GPIO_GREEN);
184
185 setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)), GPIO_GREEN);
186 }
187
188
189
190
191
192 if (status == BOOTSTAGE_ID_BOOTM_HANDOFF) {
193
194
195
196
197 clrbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)),
198 GPIO_GREEN);
199
200
201
202
203 gpio_request(LED_RED, "LED_RED_ERROR");
204 gpio_direction_output(LED_RED, 1);
205 }
206}
207#endif
208