1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * clk-synthesizer.h 4 * 5 * Clock synthesizer header 6 * 7 * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/ 8 */ 9 10#ifndef __CLK_SYNTHESIZER_H 11#define __CLK_SYNTHESIZER_H 12 13#define CLK_SYNTHESIZER_ID_REG 0x0 14#define CLK_SYNTHESIZER_XCSEL 0x05 15#define CLK_SYNTHESIZER_MUX_REG 0x14 16#define CLK_SYNTHESIZER_PDIV2_REG 0x16 17#define CLK_SYNTHESIZER_PDIV3_REG 0x17 18 19#define CLK_SYNTHESIZER_BYTE_MODE 0x80 20 21/** 22 * struct clk_synth: This structure holds data neeed for configuring 23 * for clock synthesizer. 24 * @id: The id of synthesizer 25 * @capacitor: value of the capacitor attached 26 * @mux: mux settings. 27 * @pdiv2: Div to be applied to second output 28 * @pdiv3: Div to be applied to third output 29 */ 30struct clk_synth { 31 u32 id; 32 u32 capacitor; 33 u32 mux; 34 u32 pdiv2; 35 u32 pdiv3; 36}; 37 38int setup_clock_synthesizer(struct clk_synth *data); 39 40#endif 41