1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2020 Marvell International Ltd. 4 */ 5 6#ifndef __CVMX_SRIOX_DEFS_H__ 7#define __CVMX_SRIOX_DEFS_H__ 8 9#define CVMX_SRIOX_STATUS_REG(offset) (0x00011800C8000100ull + ((offset) & 3) * 0x1000000ull) 10 11/** 12 * cvmx_srio#_status_reg 13 * 14 * The SRIO field displays if the port has been configured for SRIO operation. This register 15 * can be read regardless of whether the SRIO is selected or being reset. Although some other 16 * registers can be accessed while the ACCESS bit is zero (see individual registers for details), 17 * the majority of SRIO registers and all the SRIOMAINT registers can be used only when the 18 * ACCESS bit is asserted. 19 * 20 * This register is reset by the coprocessor-clock reset. 21 */ 22union cvmx_sriox_status_reg { 23 u64 u64; 24 struct cvmx_sriox_status_reg_s { 25 u64 reserved_9_63 : 55; 26 u64 host : 1; 27 u64 spd : 4; 28 u64 run_type : 2; 29 u64 access : 1; 30 u64 srio : 1; 31 } s; 32 struct cvmx_sriox_status_reg_cn63xx { 33 u64 reserved_2_63 : 62; 34 u64 access : 1; 35 u64 srio : 1; 36 } cn63xx; 37 struct cvmx_sriox_status_reg_cn63xx cn63xxp1; 38 struct cvmx_sriox_status_reg_cn63xx cn66xx; 39 struct cvmx_sriox_status_reg_s cnf75xx; 40}; 41 42typedef union cvmx_sriox_status_reg cvmx_sriox_status_reg_t; 43 44#endif 45