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8#include <stdio.h>
9#include <string.h>
10#include <linux/arm-smccc.h>
11#include <init.h>
12#include "cpu.h"
13
14struct pcu_ctr {
15 u32 base_config[3];
16 u32 equalization[3];
17 u8 rev[80];
18} __attribute((aligned(4)));
19
20struct pcu_config {
21 u32 magic;
22 u32 version;
23 u32 size;
24 u8 rev1[4];
25 u32 independent_tree;
26 u32 base_cfg;
27 u8 rev2[16];
28 struct pcu_ctr ctr_cfg[2];
29} __attribute((aligned(4)));
30
31struct pcu_config const peu_base_info = {
32 .magic = PARAMETER_PCIE_MAGIC,
33 .version = 0x2,
34 .size = 0x100,
35 .independent_tree = CFG_INDEPENDENT_TREE,
36 .base_cfg = ((PCI_PEU1 | (X8X8 << 1)) << PEU1_OFFSET | (PCI_PEU0 | (X8X8 << 1))),
37 .ctr_cfg[0].base_config[0] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
38 .ctr_cfg[0].base_config[1] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
39 .ctr_cfg[0].base_config[2] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
40 .ctr_cfg[1].base_config[0] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
41 .ctr_cfg[1].base_config[1] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
42 .ctr_cfg[1].base_config[2] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
43 .ctr_cfg[0].equalization[0] = 0x7,
44 .ctr_cfg[0].equalization[1] = 0x7,
45 .ctr_cfg[0].equalization[2] = 0x7,
46 .ctr_cfg[1].equalization[0] = 0x7,
47 .ctr_cfg[1].equalization[1] = 0x7,
48 .ctr_cfg[1].equalization[2] = 0x7,
49};
50
51void pcie_init(void)
52{
53 u8 buffer[0x100];
54 struct arm_smccc_res res;
55
56 memcpy(buffer, &peu_base_info, sizeof(peu_base_info));
57 arm_smccc_smc(CPU_INIT_PCIE, 0, (u64)buffer, 0, 0, 0, 0, 0, &res);
58 if (res.a0 != 0)
59 panic("PCIE init failed :0x%lx\n", res.a0);
60}
61
