LXR uboot/board/freescale/common/dcu

   1/*
   2 * Copyright 2014 Freescale Semiconductor, Inc.
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include <asm/io.h>
   8#include <common.h>
   9#include <fsl_dcu_fb.h>
  10#include <i2c.h>
  11#include <linux/fb.h>
  12
  13#define PIXEL_CLK_LSB_REG               0x00
  14#define PIXEL_CLK_MSB_REG               0x01
  15#define VERT_FREQ_LSB_REG               0x02
  16#define VERT_FREQ_MSB_REG               0x03
  17#define TOTAL_PIXELS_LSB_REG            0x04
  18#define TOTAL_PIXELS_MSB_REG            0x05
  19#define TOTAL_LINES_LSB_REG             0x06
  20#define TOTAL_LINES_MSB_REG             0x07
  21#define TPI_INBUS_FMT_REG               0x08
  22#define TPI_INPUT_FMT_REG               0x09
  23#define TPI_OUTPUT_FMT_REG              0x0A
  24#define TPI_SYS_CTRL_REG                0x1A
  25#define TPI_PWR_STAT_REG                0x1E
  26#define TPI_AUDIO_HANDING_REG           0x25
  27#define TPI_AUDIO_INTF_REG              0x26
  28#define TPI_AUDIO_FREQ_REG              0x27
  29#define TPI_SET_PAGE_REG                0xBC
  30#define TPI_SET_OFFSET_REG              0xBD
  31#define TPI_RW_ACCESS_REG               0xBE
  32#define TPI_TRANS_MODE_REG              0xC7
  33
  34#define TPI_INBUS_CLOCK_RATIO_1         (1 << 6)
  35#define TPI_INBUS_FULL_PIXEL_WIDE       (1 << 5)
  36#define TPI_INBUS_RISING_EDGE           (1 << 4)
  37#define TPI_INPUT_CLR_DEPTH_8BIT        (0 << 6)
  38#define TPI_INPUT_VRANGE_EXPAN_AUTO     (0 << 2)
  39#define TPI_INPUT_CLR_RGB               (0 << 0)
  40#define TPI_OUTPUT_CLR_DEPTH_8BIT       (0 << 6)
  41#define TPI_OUTPUT_VRANGE_COMPRE_AUTO   (0 << 2)
  42#define TPI_OUTPUT_CLR_HDMI_RGB         (0 << 0)
  43#define TPI_SYS_TMDS_OUTPUT             (0 << 4)
  44#define TPI_SYS_AV_NORAML               (0 << 3)
  45#define TPI_SYS_AV_MUTE                 (1 << 3)
  46#define TPI_SYS_DVI_MODE                (0 << 0)
  47#define TPI_SYS_HDMI_MODE               (1 << 0)
  48#define TPI_PWR_STAT_MASK               (3 << 0)
  49#define TPI_PWR_STAT_D0                 (0 << 0)
  50#define TPI_AUDIO_PASS_BASIC            (0 << 0)
  51#define TPI_AUDIO_INTF_I2S              (2 << 6)
  52#define TPI_AUDIO_INTF_NORMAL           (0 << 4)
  53#define TPI_AUDIO_TYPE_PCM              (1 << 0)
  54#define TPI_AUDIO_SAMP_SIZE_16BIT       (1 << 6)
  55#define TPI_AUDIO_SAMP_FREQ_44K         (2 << 3)
  56#define TPI_SET_PAGE_SII9022A           0x01
  57#define TPI_SET_OFFSET_SII9022A         0x82
  58#define TPI_RW_EN_SRC_TERMIN            (1 << 0)
  59#define TPI_TRANS_MODE_ENABLE           (0 << 7)
  60
  61/* Programming of Silicon SIi9022a HDMI Transmitter */
  62int dcu_set_dvi_encoder(struct fb_videomode *videomode)
  63{
  64        u8 temp;
  65        u16 temp1, temp2;
  66        u32 temp3;
  67
  68        i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
  69
  70        /* Enable TPI transmitter mode */
  71        temp = TPI_TRANS_MODE_ENABLE;
  72        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1);
  73
  74        /* Enter into D0 state, full operation */
  75        i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
  76        temp &= ~TPI_PWR_STAT_MASK;
  77        temp |= TPI_PWR_STAT_D0;
  78        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1);
  79
  80        /* Enable source termination */
  81        temp = TPI_SET_PAGE_SII9022A;
  82        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1);
  83        temp = TPI_SET_OFFSET_SII9022A;
  84        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1);
  85
  86        i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
  87        temp |= TPI_RW_EN_SRC_TERMIN;
  88        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1);
  89
  90        /* Set TPI system control */
  91        temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
  92        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1);
  93
  94        /* Set pixel clock */
  95        temp1 = PICOS2KHZ(videomode->pixclock) / 10;
  96        temp = (u8)(temp1 & 0xFF);
  97        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1);
  98        temp = (u8)(temp1 >> 8);
  99        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1);
 100
 101        /* Set total pixels per line */
 102        temp1 = videomode->hsync_len + videomode->left_margin +
 103                videomode->xres + videomode->right_margin;
 104        temp = (u8)(temp1 & 0xFF);
 105        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1);
 106        temp = (u8)(temp1 >> 8);
 107        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1);
 108
 109        /* Set total lines */
 110        temp2 = videomode->vsync_len + videomode->upper_margin +
 111                videomode->yres + videomode->lower_margin;
 112        temp = (u8)(temp2 & 0xFF);
 113        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1);
 114        temp = (u8)(temp2 >> 8);
 115        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1);
 116
 117        /* Set vertical frequency in Hz */
 118        temp3 = temp1 * temp2;
 119        temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
 120        temp1 = (u16)temp3 * 100;
 121        temp = (u8)(temp1 & 0xFF);
 122        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1);
 123        temp = (u8)(temp1 >> 8);
 124        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1);
 125
 126        /* Set TPI input bus and pixel repetition data */
 127        temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
 128                TPI_INBUS_RISING_EDGE;
 129        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1);
 130
 131        /* Set TPI AVI Input format data */
 132        temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO |
 133                TPI_INPUT_CLR_RGB;
 134        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1);
 135
 136        /* Set TPI AVI Output format data */
 137        temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO |
 138                TPI_OUTPUT_CLR_HDMI_RGB;
 139        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1);
 140
 141        /* Set TPI audio configuration write data */
 142        temp = TPI_AUDIO_PASS_BASIC;
 143        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1);
 144
 145        temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL |
 146                TPI_AUDIO_TYPE_PCM;
 147        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1);
 148
 149        temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K;
 150        i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1);
 151
 152        return 0;
 153}
 154