LXR uboot/board/freescale/m52277evb/m52277evb.c

   1/*
   2 * (C) Copyright 2000-2003
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
   6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#include <common.h>
  12#include <asm/immap.h>
  13#include <asm/io.h>
  14
  15DECLARE_GLOBAL_DATA_PTR;
  16
  17int checkboard(void)
  18{
  19        puts("Board: ");
  20        puts("Freescale M52277 EVB\n");
  21        return 0;
  22};
  23
  24phys_size_t initdram(int board_type)
  25{
  26        u32 dramsize;
  27
  28#ifdef CONFIG_CF_SBF
  29        /*
  30         * Serial Boot: The dram is already initialized in start.S
  31         * only require to return DRAM size
  32         */
  33        dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
  34#else
  35        sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
  36        gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
  37        u32 i;
  38
  39        dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
  40
  41        for (i = 0x13; i < 0x20; i++) {
  42                if (dramsize == (1 << i))
  43                        break;
  44        }
  45        i--;
  46
  47        out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
  48
  49        out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
  50
  51        out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
  52        out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
  53
  54        /* Issue PALL */
  55        out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
  56        __asm__("nop");
  57
  58        /* Issue LEMR */
  59        out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
  60        __asm__("nop");
  61        out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
  62        __asm__("nop");
  63
  64        udelay(1000);
  65
  66        /* Issue PALL */
  67        out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
  68        __asm__("nop");
  69
  70        /* Perform two refresh cycles */
  71        out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
  72        __asm__("nop");
  73        out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
  74        __asm__("nop");
  75
  76        out_be32(&sdram->sdcr,
  77                (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
  78
  79        udelay(100);
  80#endif
  81        return (dramsize);
  82};
  83
  84int testdram(void)
  85{
  86        /* TODO: XXX XXX XXX */
  87        printf("DRAM test not implemented!\n");
  88
  89        return (0);
  90}
  91