LXR uboot/board/iomega/iconnect/iconnect.c

   1/*
   2 * Copyright (C) 2009-2012
   3 * Wojciech Dubowik <wojciech.dubowik@neratec.com>
   4 * Luka Perkov <luka@openwrt.org>
   5 *
   6 * SPDX-License-Identifier:     GPL-2.0+
   7 */
   8
   9#include <common.h>
  10#include <miiphy.h>
  11#include <asm/arch/cpu.h>
  12#include <asm/arch/soc.h>
  13#include <asm/arch/mpp.h>
  14#include "iconnect.h"
  15
  16DECLARE_GLOBAL_DATA_PTR;
  17
  18int board_early_init_f(void)
  19{
  20        /*
  21         * default gpio configuration
  22         * There are maximum 64 gpios controlled through 2 sets of registers
  23         * the below configuration configures mainly initial LED status
  24         */
  25        mvebu_config_gpio(ICONNECT_OE_VAL_LOW,
  26                          ICONNECT_OE_VAL_HIGH,
  27                          ICONNECT_OE_LOW, ICONNECT_OE_HIGH);
  28
  29        /* Multi-Purpose Pins Functionality configuration */
  30        static const u32 kwmpp_config[] = {
  31                MPP0_NF_IO2,
  32                MPP1_NF_IO3,
  33                MPP2_NF_IO4,
  34                MPP3_NF_IO5,
  35                MPP4_NF_IO6,
  36                MPP5_NF_IO7,
  37                MPP6_SYSRST_OUTn,       /* Reset signal */
  38                MPP7_GPO,
  39                MPP8_TW_SDA,            /* I2C */
  40                MPP9_TW_SCK,            /* I2C */
  41                MPP10_UART0_TXD,
  42                MPP11_UART0_RXD,
  43                MPP12_GPO,              /* Reset button */
  44                MPP13_SD_CMD,
  45                MPP14_SD_D0,
  46                MPP15_SD_D1,
  47                MPP16_SD_D2,
  48                MPP17_SD_D3,
  49                MPP18_NF_IO0,
  50                MPP19_NF_IO1,
  51                MPP20_GE1_0,
  52                MPP21_GE1_1,
  53                MPP22_GE1_2,
  54                MPP23_GE1_3,
  55                MPP24_GE1_4,
  56                MPP25_GE1_5,
  57                MPP26_GE1_6,
  58                MPP27_GE1_7,
  59                MPP28_GPIO,
  60                MPP29_GPIO,
  61                MPP30_GE1_10,
  62                MPP31_GE1_11,
  63                MPP32_GE1_12,
  64                MPP33_GE1_13,
  65                MPP34_GE1_14,
  66                MPP35_GPIO,             /* OTB button */
  67                MPP36_AUDIO_SPDIFI,
  68                MPP37_AUDIO_SPDIFO,
  69                MPP38_GPIO,
  70                MPP39_TDM_SPI_CS0,
  71                MPP40_TDM_SPI_SCK,
  72                MPP41_GPIO,             /* LED brightness */
  73                MPP42_GPIO,             /* LED power (blue) */
  74                MPP43_GPIO,             /* LED power (red) */
  75                MPP44_GPIO,             /* LED USB 1 */
  76                MPP45_GPIO,             /* LED USB 2 */
  77                MPP46_GPIO,             /* LED USB 3 */
  78                MPP47_GPIO,             /* LED USB 4 */
  79                MPP48_GPIO,             /* LED OTB */
  80                MPP49_GPIO,
  81                0
  82        };
  83        kirkwood_mpp_conf(kwmpp_config, NULL);
  84        return 0;
  85}
  86
  87int board_init(void)
  88{
  89        /* adress of boot parameters */
  90        gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  91
  92        return 0;
  93}
  94